4 files changed, 24 insertions, 0 deletions
diff --git a/src/literal.h b/src/literal.h
index 0b1b6fa90..28e6f03cf 100644
--- a/src/literal.h
+++ b/src/literal.h
@@ -628,6 +628,10 @@ public:
   Literal extendHighSToVecI32x4() const;
   Literal extendLowUToVecI32x4() const;
   Literal extendHighUToVecI32x4() const;
+  Literal extendLowSToVecI64x2() const;
+  Literal extendHighSToVecI64x2() const;
+  Literal extendLowUToVecI64x2() const;
+  Literal extendHighUToVecI64x2() const;
   Literal swizzleVec8x16(const Literal& other) const;
 
   // Checks if an RTT value is a sub-rtt of another, that is, whether GC data
diff --git a/src/wasm-interpreter.h b/src/wasm-interpreter.h
index f646ed976..872d90603 100644
--- a/src/wasm-interpreter.h
+++ b/src/wasm-interpreter.h
@@ -562,9 +562,13 @@ public:
       case ExtendHighUVecI16x8ToVecI32x4:
         return value.extendHighUToVecI32x4();
       case ExtendLowSVecI32x4ToVecI64x2:
+        return value.extendLowSToVecI64x2();
       case ExtendHighSVecI32x4ToVecI64x2:
+        return value.extendHighSToVecI64x2();
       case ExtendLowUVecI32x4ToVecI64x2:
+        return value.extendLowUToVecI64x2();
       case ExtendHighUVecI32x4ToVecI64x2:
+        return value.extendHighUToVecI64x2();
       case ConvertLowSVecI32x4ToVecF64x2:
       case ConvertLowUVecI32x4ToVecF64x2:
       case TruncSatZeroSVecF64x2ToVecI32x4:
diff --git a/src/wasm/literal.cpp b/src/wasm/literal.cpp
index 2c5bff5b1..5a8ec3df3 100644
--- a/src/wasm/literal.cpp
+++ b/src/wasm/literal.cpp
@@ -2387,6 +2387,18 @@ Literal Literal::extendLowUToVecI32x4() const {
 Literal Literal::extendHighUToVecI32x4() const {
   return extend<4, uint16_t, uint32_t, LaneOrder::High>(*this);
 }
+Literal Literal::extendLowSToVecI64x2() const {
+  return extend<2, int32_t, int64_t, LaneOrder::Low>(*this);
+}
+Literal Literal::extendHighSToVecI64x2() const {
+  return extend<2, int32_t, int64_t, LaneOrder::High>(*this);
+}
+Literal Literal::extendLowUToVecI64x2() const {
+  return extend<2, uint32_t, uint64_t, LaneOrder::Low>(*this);
+}
+Literal Literal::extendHighUToVecI64x2() const {
+  return extend<2, uint32_t, uint64_t, LaneOrder::High>(*this);
+}
 
 Literal Literal::extMulLowSI16x8(const Literal& other) const {
   WASM_UNREACHABLE("TODO: implement SIMD extending multiplications");
diff --git a/test/spec/simd.wast b/test/spec/simd.wast
index 9a76fec3b..31c44b453 100644
--- a/test/spec/simd.wast
+++ b/test/spec/simd.wast
@@ -977,6 +977,10 @@
 (assert_return (invoke "i32x4.extend_high_i16x8_s" (v128.const i16x8 0 1 -1 32768 32767 32769 16384 -16384)) (v128.const i32x4 32767 -32767 16384 -16384))
 (assert_return (invoke "i32x4.extend_low_i16x8_u" (v128.const i16x8 0 1 -1 32768 32767 32769 16384 -16384)) (v128.const i32x4 0 1 65535 32768))
 (assert_return (invoke "i32x4.extend_high_i16x8_u" (v128.const i16x8 0 1 -1 32768 32767 32769 16384 -16384)) (v128.const i32x4 32767 32769 16384 49152))
+(assert_return (invoke "i64x2.extend_low_i32x4_s" (v128.const i32x4 -1 -1 -2147483648 -2147483648)) (v128.const i64x2 -1 -1))
+(assert_return (invoke "i64x2.extend_high_i32x4_s" (v128.const i32x4 2147483647 2147483647 -1 -1)) (v128.const i64x2 -1 -1))
+(assert_return (invoke "i64x2.extend_low_i32x4_u" (v128.const i32x4 -1 -1 2 2)) (v128.const i64x2 4294967295 4294967295))
+(assert_return (invoke "i64x2.extend_high_i32x4_u" (v128.const i32x4 2 2 -1 -1)) (v128.const i64x2 4294967295 4294967295))
 (assert_return (invoke "v128.load8x8_s" (i32.const 256)) (v128.const i16x8 0xff80 0xff90 0xffa0 0xffb0 0xffc0 0xffd0 0xffe0 0xfff0))
 (assert_return (invoke "v128.load8x8_u" (i32.const 256)) (v128.const i16x8 0x0080 0x0090 0x00a0 0x00b0 0x00c0 0x00d0 0x00e0 0x00f0))
 (assert_return (invoke "v128.load16x4_s" (i32.const 256)) (v128.const i32x4 0xffff9080 0xffffb0a0 0xffffd0c0 0xfffff0e0))