5 files changed, 30 insertions, 30 deletions
diff --git a/src/wasm/wasm-binary.cpp b/src/wasm/wasm-binary.cpp
index ed18cc0e4..9f675ce6c 100644
--- a/src/wasm/wasm-binary.cpp
+++ b/src/wasm/wasm-binary.cpp
@@ -5834,19 +5834,19 @@ bool WasmBinaryBuilder::maybeVisitSIMDLoad(Expression*& out, uint32_t code) {
   switch (code) {
     case BinaryConsts::V8x16LoadSplat:
       curr = allocator.alloc<SIMDLoad>();
-      curr->op = LoadSplatVec8x16;
+      curr->op = Load8SplatVec128;
       break;
     case BinaryConsts::V16x8LoadSplat:
       curr = allocator.alloc<SIMDLoad>();
-      curr->op = LoadSplatVec16x8;
+      curr->op = Load16SplatVec128;
       break;
     case BinaryConsts::V32x4LoadSplat:
       curr = allocator.alloc<SIMDLoad>();
-      curr->op = LoadSplatVec32x4;
+      curr->op = Load32SplatVec128;
       break;
     case BinaryConsts::V64x2LoadSplat:
       curr = allocator.alloc<SIMDLoad>();
-      curr->op = LoadSplatVec64x2;
+      curr->op = Load64SplatVec128;
       break;
     case BinaryConsts::I16x8LoadExtSVec8x8:
       curr = allocator.alloc<SIMDLoad>();
@@ -5874,11 +5874,11 @@ bool WasmBinaryBuilder::maybeVisitSIMDLoad(Expression*& out, uint32_t code) {
       break;
     case BinaryConsts::V128Load32Zero:
       curr = allocator.alloc<SIMDLoad>();
-      curr->op = Load32Zero;
+      curr->op = Load32ZeroVec128;
       break;
     case BinaryConsts::V128Load64Zero:
       curr = allocator.alloc<SIMDLoad>();
-      curr->op = Load64Zero;
+      curr->op = Load64ZeroVec128;
       break;
     default:
       return false;
diff --git a/src/wasm/wasm-s-parser.cpp b/src/wasm/wasm-s-parser.cpp
index a5f5f88f2..93c22c502 100644
--- a/src/wasm/wasm-s-parser.cpp
+++ b/src/wasm/wasm-s-parser.cpp
@@ -2032,24 +2032,24 @@ Expression* SExpressionWasmBuilder::makeSIMDLoad(Element& s, SIMDLoadOp op) {
   ret->op = op;
   Address defaultAlign;
   switch (op) {
-    case LoadSplatVec8x16:
+    case Load8SplatVec128:
       defaultAlign = 1;
       break;
-    case LoadSplatVec16x8:
+    case Load16SplatVec128:
       defaultAlign = 2;
       break;
-    case LoadSplatVec32x4:
-    case Load32Zero:
+    case Load32SplatVec128:
+    case Load32ZeroVec128:
       defaultAlign = 4;
       break;
-    case LoadSplatVec64x2:
+    case Load64SplatVec128:
     case LoadExtSVec8x8ToVecI16x8:
     case LoadExtUVec8x8ToVecI16x8:
     case LoadExtSVec16x4ToVecI32x4:
     case LoadExtUVec16x4ToVecI32x4:
     case LoadExtSVec32x2ToVecI64x2:
     case LoadExtUVec32x2ToVecI64x2:
-    case Load64Zero:
+    case Load64ZeroVec128:
       defaultAlign = 8;
       break;
   }
diff --git a/src/wasm/wasm-stack.cpp b/src/wasm/wasm-stack.cpp
index 31b5f1e4e..0965ca0fe 100644
--- a/src/wasm/wasm-stack.cpp
+++ b/src/wasm/wasm-stack.cpp
@@ -594,16 +594,16 @@ void BinaryInstWriter::visitSIMDShift(SIMDShift* curr) {
 void BinaryInstWriter::visitSIMDLoad(SIMDLoad* curr) {
   o << int8_t(BinaryConsts::SIMDPrefix);
   switch (curr->op) {
-    case LoadSplatVec8x16:
+    case Load8SplatVec128:
       o << U32LEB(BinaryConsts::V8x16LoadSplat);
       break;
-    case LoadSplatVec16x8:
+    case Load16SplatVec128:
       o << U32LEB(BinaryConsts::V16x8LoadSplat);
       break;
-    case LoadSplatVec32x4:
+    case Load32SplatVec128:
       o << U32LEB(BinaryConsts::V32x4LoadSplat);
       break;
-    case LoadSplatVec64x2:
+    case Load64SplatVec128:
       o << U32LEB(BinaryConsts::V64x2LoadSplat);
       break;
     case LoadExtSVec8x8ToVecI16x8:
@@ -624,10 +624,10 @@ void BinaryInstWriter::visitSIMDLoad(SIMDLoad* curr) {
     case LoadExtUVec32x2ToVecI64x2:
       o << U32LEB(BinaryConsts::I64x2LoadExtUVec32x2);
       break;
-    case Load32Zero:
+    case Load32ZeroVec128:
       o << U32LEB(BinaryConsts::V128Load32Zero);
       break;
-    case Load64Zero:
+    case Load64ZeroVec128:
       o << U32LEB(BinaryConsts::V128Load64Zero);
       break;
   }
diff --git a/src/wasm/wasm-validator.cpp b/src/wasm/wasm-validator.cpp
index 2ac4e3187..2b5a29a9d 100644
--- a/src/wasm/wasm-validator.cpp
+++ b/src/wasm/wasm-validator.cpp
@@ -1190,20 +1190,20 @@ void FunctionValidator::visitSIMDLoad(SIMDLoad* curr) {
     "load_splat address must match memory index type");
   Type memAlignType = Type::none;
   switch (curr->op) {
-    case LoadSplatVec8x16:
-    case LoadSplatVec16x8:
-    case LoadSplatVec32x4:
-    case Load32Zero:
+    case Load8SplatVec128:
+    case Load16SplatVec128:
+    case Load32SplatVec128:
+    case Load32ZeroVec128:
       memAlignType = Type::i32;
       break;
-    case LoadSplatVec64x2:
+    case Load64SplatVec128:
     case LoadExtSVec8x8ToVecI16x8:
     case LoadExtUVec8x8ToVecI16x8:
     case LoadExtSVec16x4ToVecI32x4:
     case LoadExtUVec16x4ToVecI32x4:
     case LoadExtSVec32x2ToVecI64x2:
     case LoadExtUVec32x2ToVecI64x2:
-    case Load64Zero:
+    case Load64ZeroVec128:
       memAlignType = Type::i64;
       break;
   }
diff --git a/src/wasm/wasm.cpp b/src/wasm/wasm.cpp
index 5fe5eea4a..a05cd21a0 100644
--- a/src/wasm/wasm.cpp
+++ b/src/wasm/wasm.cpp
@@ -471,21 +471,21 @@ void SIMDLoad::finalize() {
 
 Index SIMDLoad::getMemBytes() {
   switch (op) {
-    case LoadSplatVec8x16:
+    case Load8SplatVec128:
       return 1;
-    case LoadSplatVec16x8:
+    case Load16SplatVec128:
       return 2;
-    case LoadSplatVec32x4:
-    case Load32Zero:
+    case Load32SplatVec128:
+    case Load32ZeroVec128:
       return 4;
-    case LoadSplatVec64x2:
+    case Load64SplatVec128:
     case LoadExtSVec8x8ToVecI16x8:
     case LoadExtUVec8x8ToVecI16x8:
     case LoadExtSVec16x4ToVecI32x4:
     case LoadExtUVec16x4ToVecI32x4:
     case LoadExtSVec32x2ToVecI64x2:
     case LoadExtUVec32x2ToVecI64x2:
-    case Load64Zero:
+    case Load64ZeroVec128:
       return 8;
   }
   WASM_UNREACHABLE("unexpected op");