From d945aa489a1ad62c130e04ceea8492c7a728ab57 Mon Sep 17 00:00:00 2001 From: Brendan Dahl Date: Thu, 8 Aug 2024 10:22:51 -0700 Subject: [FP16] Implement lane access instructions. (#6821) Specified at https://github.com/WebAssembly/half-precision/blob/main/proposals/half-precision/Overview.md --- scripts/gen-s-parser.py | 3 +++ 1 file changed, 3 insertions(+) (limited to 'scripts/gen-s-parser.py') diff --git a/scripts/gen-s-parser.py b/scripts/gen-s-parser.py index f35109644..9519ad4ee 100755 --- a/scripts/gen-s-parser.py +++ b/scripts/gen-s-parser.py @@ -298,6 +298,9 @@ instructions = [ ("i64x2.splat", "makeUnary(UnaryOp::SplatVecI64x2)"), ("i64x2.extract_lane", "makeSIMDExtract(SIMDExtractOp::ExtractLaneVecI64x2, 2)"), ("i64x2.replace_lane", "makeSIMDReplace(SIMDReplaceOp::ReplaceLaneVecI64x2, 2)"), + ("f16x8.splat", "makeUnary(UnaryOp::SplatVecF16x8)"), + ("f16x8.extract_lane", "makeSIMDExtract(SIMDExtractOp::ExtractLaneVecF16x8, 8)"), + ("f16x8.replace_lane", "makeSIMDReplace(SIMDReplaceOp::ReplaceLaneVecF16x8, 8)"), ("f32x4.splat", "makeUnary(UnaryOp::SplatVecF32x4)"), ("f32x4.extract_lane", "makeSIMDExtract(SIMDExtractOp::ExtractLaneVecF32x4, 4)"), ("f32x4.replace_lane", "makeSIMDReplace(SIMDReplaceOp::ReplaceLaneVecF32x4, 4)"), -- cgit v1.2.3