From e2ceaa58c10e9ee3e9eece42466243f5a8aff125 Mon Sep 17 00:00:00 2001
From: Brendan Dahl <brendan.dahl@gmail.com>
Date: Tue, 27 Aug 2024 13:07:49 -0700
Subject: Rename relaxed SIMD fma instructions to match spec. (#6876)
The instructions relaxed_fma and relaxed_fnma have been renamed to
relaxed_madd and relaxed_nmadd.
https://github.com/WebAssembly/relaxed-simd/blob/main/proposals/relaxed-simd/Overview.md#binary-format
---
scripts/gen-s-parser.py | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
(limited to 'scripts')
diff --git a/scripts/gen-s-parser.py b/scripts/gen-s-parser.py
index 49fa6afb6..0b5703b9e 100755
--- a/scripts/gen-s-parser.py
+++ b/scripts/gen-s-parser.py
@@ -547,10 +547,10 @@ instructions = [
("i32x4.relaxed_trunc_f32x4_u", "makeUnary(UnaryOp::RelaxedTruncUVecF32x4ToVecI32x4)"),
("i32x4.relaxed_trunc_f64x2_s_zero", "makeUnary(UnaryOp::RelaxedTruncZeroSVecF64x2ToVecI32x4)"),
("i32x4.relaxed_trunc_f64x2_u_zero", "makeUnary(UnaryOp::RelaxedTruncZeroUVecF64x2ToVecI32x4)"),
- ("f32x4.relaxed_fma", "makeSIMDTernary(SIMDTernaryOp::RelaxedFmaVecF32x4)"),
- ("f32x4.relaxed_fms", "makeSIMDTernary(SIMDTernaryOp::RelaxedFmsVecF32x4)"),
- ("f64x2.relaxed_fma", "makeSIMDTernary(SIMDTernaryOp::RelaxedFmaVecF64x2)"),
- ("f64x2.relaxed_fms", "makeSIMDTernary(SIMDTernaryOp::RelaxedFmsVecF64x2)"),
+ ("f32x4.relaxed_madd", "makeSIMDTernary(SIMDTernaryOp::RelaxedMaddVecF32x4)"),
+ ("f32x4.relaxed_nmadd", "makeSIMDTernary(SIMDTernaryOp::RelaxedNmaddVecF32x4)"),
+ ("f64x2.relaxed_madd", "makeSIMDTernary(SIMDTernaryOp::RelaxedMaddVecF64x2)"),
+ ("f64x2.relaxed_nmadd", "makeSIMDTernary(SIMDTernaryOp::RelaxedNmaddVecF64x2)"),
("i8x16.laneselect", "makeSIMDTernary(SIMDTernaryOp::LaneselectI8x16)"),
("i16x8.laneselect", "makeSIMDTernary(SIMDTernaryOp::LaneselectI16x8)"),
("i32x4.laneselect", "makeSIMDTernary(SIMDTernaryOp::LaneselectI32x4)"),
--
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