From 1bb172c789bb3a61aeaae78f5464d0544627ed3e Mon Sep 17 00:00:00 2001
From: Thomas Lively <7121787+tlively@users.noreply.github.com>
Date: Mon, 5 Apr 2021 12:33:25 -0700
Subject: Update SIMD names and opcodes (#3771)

Also removes experimental SIMD instructions that were not included in the final
spec proposal.
---
 src/tools/fuzzing.h | 28 +++++++++++-----------------
 1 file changed, 11 insertions(+), 17 deletions(-)

(limited to 'src/tools/fuzzing.h')

diff --git a/src/tools/fuzzing.h b/src/tools/fuzzing.h
index e6a12543a..81eab1d28 100644
--- a/src/tools/fuzzing.h
+++ b/src/tools/fuzzing.h
@@ -2210,11 +2210,10 @@ private:
           }
           case Type::v128: {
             assert(wasm.features.hasSIMD());
-            return buildUnary({pick(AnyTrueVecI8x16,
+            // TODO: Add the other SIMD unary ops
+            return buildUnary({pick(AnyTrueVec128,
                                     AllTrueVecI8x16,
-                                    AnyTrueVecI16x8,
                                     AllTrueVecI16x8,
-                                    AnyTrueVecI32x4,
                                     AllTrueVecI32x4),
                                make(Type::v128)});
           }
@@ -2335,7 +2334,7 @@ private:
             return buildUnary({SplatVecF64x2, make(Type::f64)});
           case 4:
             return buildUnary({pick(NotVec128,
-                                    // TODO: i8x16.popcnt once merged
+                                    // TODO: add additional SIMD instructions
                                     NegVecI8x16,
                                     NegVecI16x8,
                                     NegVecI32x4,
@@ -2348,20 +2347,16 @@ private:
                                     SqrtVecF64x2,
                                     TruncSatSVecF32x4ToVecI32x4,
                                     TruncSatUVecF32x4ToVecI32x4,
-                                    TruncSatSVecF64x2ToVecI64x2,
-                                    TruncSatUVecF64x2ToVecI64x2,
                                     ConvertSVecI32x4ToVecF32x4,
                                     ConvertUVecI32x4ToVecF32x4,
-                                    ConvertSVecI64x2ToVecF64x2,
-                                    ConvertUVecI64x2ToVecF64x2,
-                                    WidenLowSVecI8x16ToVecI16x8,
-                                    WidenHighSVecI8x16ToVecI16x8,
-                                    WidenLowUVecI8x16ToVecI16x8,
-                                    WidenHighUVecI8x16ToVecI16x8,
-                                    WidenLowSVecI16x8ToVecI32x4,
-                                    WidenHighSVecI16x8ToVecI32x4,
-                                    WidenLowUVecI16x8ToVecI32x4,
-                                    WidenHighUVecI16x8ToVecI32x4),
+                                    ExtendLowSVecI8x16ToVecI16x8,
+                                    ExtendHighSVecI8x16ToVecI16x8,
+                                    ExtendLowUVecI8x16ToVecI16x8,
+                                    ExtendHighUVecI8x16ToVecI16x8,
+                                    ExtendLowSVecI16x8ToVecI32x4,
+                                    ExtendHighSVecI16x8ToVecI32x4,
+                                    ExtendLowUVecI16x8ToVecI32x4,
+                                    ExtendHighUVecI16x8ToVecI32x4),
                                make(Type::v128)});
         }
         WASM_UNREACHABLE("invalid value");
@@ -2558,7 +2553,6 @@ private:
                                  SubVecI8x16,
                                  SubSatSVecI8x16,
                                  SubSatUVecI8x16,
-                                 MulVecI8x16,
                                  MinSVecI8x16,
                                  MinUVecI8x16,
                                  MaxSVecI8x16,
-- 
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