From 70d62322406b3eac5441efe1ebd7ba4058c4f4a7 Mon Sep 17 00:00:00 2001
From: Daniel Wirtz <dcode@dcode.io>
Date: Sun, 11 Apr 2021 19:58:43 +0200
Subject: Rename various SIMD load instructions (#3795)

Renames the SIMD instructions
* LoadSplatVec8x16 -> Load8SplatVec128
* LoadSplatVec16x8 -> Load16SplatVec128
* LoadSplatVec32x4 -> Load32SplatVec128
* LoadSplatVec64x2 -> Load64SplatVec128
* Load32Zero -> Load32ZeroVec128
* Load64Zero -> Load64ZeroVec128
---
 src/wasm/wasm-validator.cpp | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

(limited to 'src/wasm/wasm-validator.cpp')

diff --git a/src/wasm/wasm-validator.cpp b/src/wasm/wasm-validator.cpp
index 2ac4e3187..2b5a29a9d 100644
--- a/src/wasm/wasm-validator.cpp
+++ b/src/wasm/wasm-validator.cpp
@@ -1190,20 +1190,20 @@ void FunctionValidator::visitSIMDLoad(SIMDLoad* curr) {
     "load_splat address must match memory index type");
   Type memAlignType = Type::none;
   switch (curr->op) {
-    case LoadSplatVec8x16:
-    case LoadSplatVec16x8:
-    case LoadSplatVec32x4:
-    case Load32Zero:
+    case Load8SplatVec128:
+    case Load16SplatVec128:
+    case Load32SplatVec128:
+    case Load32ZeroVec128:
       memAlignType = Type::i32;
       break;
-    case LoadSplatVec64x2:
+    case Load64SplatVec128:
     case LoadExtSVec8x8ToVecI16x8:
     case LoadExtUVec8x8ToVecI16x8:
     case LoadExtSVec16x4ToVecI32x4:
     case LoadExtUVec16x4ToVecI32x4:
     case LoadExtSVec32x2ToVecI64x2:
     case LoadExtUVec32x2ToVecI64x2:
-    case Load64Zero:
+    case Load64ZeroVec128:
       memAlignType = Type::i64;
       break;
   }
-- 
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