From 844998f1b4f4b0f439875e6b36bc6b821be87939 Mon Sep 17 00:00:00 2001
From: Thomas Lively <7121787+tlively@users.noreply.github.com>
Date: Sat, 14 Sep 2019 16:25:43 -0700
Subject: SIMD narrowing and widening operations (#2341)

---
 src/wasm/wasm-validator.cpp | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

(limited to 'src/wasm/wasm-validator.cpp')

diff --git a/src/wasm/wasm-validator.cpp b/src/wasm/wasm-validator.cpp
index f2d6c259b..e64e2ef73 100644
--- a/src/wasm/wasm-validator.cpp
+++ b/src/wasm/wasm-validator.cpp
@@ -1330,7 +1330,11 @@ void FunctionValidator::visitBinary(Binary* curr) {
     case MulVecF64x2:
     case DivVecF64x2:
     case MinVecF64x2:
-    case MaxVecF64x2: {
+    case MaxVecF64x2:
+    case NarrowSVecI16x8ToVecI8x16:
+    case NarrowUVecI16x8ToVecI8x16:
+    case NarrowSVecI32x4ToVecI16x8:
+    case NarrowUVecI32x4ToVecI16x8: {
       shouldBeEqualOrFirstIsUnreachable(
         curr->left->type, v128, curr, "v128 op");
       shouldBeEqualOrFirstIsUnreachable(
@@ -1528,6 +1532,14 @@ void FunctionValidator::visitUnary(Unary* curr) {
     case ConvertUVecI32x4ToVecF32x4:
     case ConvertSVecI64x2ToVecF64x2:
     case ConvertUVecI64x2ToVecF64x2:
+    case WidenLowSVecI8x16ToVecI16x8:
+    case WidenHighSVecI8x16ToVecI16x8:
+    case WidenLowUVecI8x16ToVecI16x8:
+    case WidenHighUVecI8x16ToVecI16x8:
+    case WidenLowSVecI16x8ToVecI32x4:
+    case WidenHighSVecI16x8ToVecI32x4:
+    case WidenLowUVecI16x8ToVecI32x4:
+    case WidenHighUVecI16x8ToVecI32x4:
       shouldBeEqual(curr->type, v128, curr, "expected v128 type");
       shouldBeEqual(curr->value->type, v128, curr, "expected v128 operand");
       break;
-- 
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