From b79661ee03fc74b3f860bf04e6f1019f7b11c722 Mon Sep 17 00:00:00 2001 From: Thomas Lively <7121787+tlively@users.noreply.github.com> Date: Tue, 5 Jan 2021 19:27:53 -0500 Subject: Prototype SIMD extending pairwise add instructions (#3466) As proposed in https://github.com/WebAssembly/simd/pull/380, using the opcodes used in LLVM and V8. Since these opcodes overlap with the opcodes of i64x2.all_true and i64x2.any_true, which have long since been removed from the SIMD proposal, this PR also removes those instructions. --- src/wasm/wasm.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'src/wasm/wasm.cpp') diff --git a/src/wasm/wasm.cpp b/src/wasm/wasm.cpp index 436eedb2b..264f2bf83 100644 --- a/src/wasm/wasm.cpp +++ b/src/wasm/wasm.cpp @@ -783,6 +783,10 @@ void Unary::finalize() { case FloorVecF64x2: case TruncVecF64x2: case NearestVecF64x2: + case ExtAddPairwiseSVecI8x16ToI16x8: + case ExtAddPairwiseUVecI8x16ToI16x8: + case ExtAddPairwiseSVecI16x8ToI32x4: + case ExtAddPairwiseUVecI16x8ToI32x4: case TruncSatSVecF32x4ToVecI32x4: case TruncSatUVecF32x4ToVecI32x4: case TruncSatSVecF64x2ToVecI64x2: @@ -808,11 +812,9 @@ void Unary::finalize() { case AnyTrueVecI8x16: case AnyTrueVecI16x8: case AnyTrueVecI32x4: - case AnyTrueVecI64x2: case AllTrueVecI8x16: case AllTrueVecI16x8: case AllTrueVecI32x4: - case AllTrueVecI64x2: case BitmaskVecI8x16: case BitmaskVecI16x8: case BitmaskVecI32x4: -- cgit v1.2.3