summaryrefslogtreecommitdiff
path: root/lisp/progmodes/verilog-mode.el
diff options
context:
space:
mode:
Diffstat (limited to 'lisp/progmodes/verilog-mode.el')
-rw-r--r--lisp/progmodes/verilog-mode.el8
1 files changed, 3 insertions, 5 deletions
diff --git a/lisp/progmodes/verilog-mode.el b/lisp/progmodes/verilog-mode.el
index 9e241c70e76..f55cf0002d0 100644
--- a/lisp/progmodes/verilog-mode.el
+++ b/lisp/progmodes/verilog-mode.el
@@ -2053,7 +2053,7 @@ find the errors."
"`resetall" "`timescale" "`unconnected_drive" "`undef" "`undefineall"
;; compiler directives not covered by IEEE 1800
"`case" "`default" "`endfor" "`endprotect" "`endswitch" "`endwhile" "`for"
- "`format" "`if" "`let" "`protect" "`switch" "`timescale" "`time_scale"
+ "`format" "`if" "`let" "`protect" "`switch" "`time_scale"
"`while"
))
"List of Verilog compiler directives.")
@@ -2414,9 +2414,7 @@ find the errors."
'(
;; blocking assignment_operator
"=" "+=" "-=" "*=" "/=" "%=" "&=" "|=" "^=" "<<=" ">>=" "<<<=" ">>>="
- ;; non blocking assignment operator
- "<="
- ;; comparison
+ ;; comparison (also nonblocking assignment "<=")
"==" "!=" "===" "!==" "<=" ">=" "==?" "!=?" "<->"
;; event_trigger
"->" "->>"
@@ -2973,7 +2971,7 @@ find the errors."
"\\<\\(`pragma\\)\\>\\s-+.+$"
"\\)\\|\\(?:"
;; `timescale time_unit / time_precision
- "\\<\\(`timescale\\)\\>\\s-+10\\{0,2\\}\\s-*[munpf]?s\\s-*\\/\\s-*10\\{0,2\\}\\s-*[munpf]?s"
+ "\\<\\(`timescale\\)\\>\\s-+10\\{0,2\\}\\s-*[munpf]?s\\s-*/\\s-*10\\{0,2\\}\\s-*[munpf]?s"
"\\)\\|\\(?:"
;; `define and `if can span multiple lines if line ends in '\'. NOTE: `if is not IEEE 1800-2012
;; from http://www.emacswiki.org/emacs/MultilineRegexp