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-rw-r--r--src/interp.cc34
1 files changed, 32 insertions, 2 deletions
diff --git a/src/interp.cc b/src/interp.cc
index 0a6b5276..4a5358b0 100644
--- a/src/interp.cc
+++ b/src/interp.cc
@@ -1106,6 +1106,12 @@ ValueTypeRep<T> IntNeg(ValueTypeRep<T> v_rep) {
return ToRep(-tmp);
}
+template <typename T>
+ValueTypeRep<T> IntNot(ValueTypeRep<T> v_rep) {
+ T tmp = static_cast<T>(v_rep);
+ return ToRep(~tmp);
+}
+
// f{32,64}.abs
template <typename T>
ValueTypeRep<T> FloatAbs(ValueTypeRep<T> v_rep) {
@@ -2551,6 +2557,22 @@ Result Thread::Run(int num_instructions) {
CHECK_TRAP(SimdBinop<v128, uint64_t>(IntShr<uint64_t>));
break;
}
+
+ case Opcode::V128And:
+ CHECK_TRAP(SimdBinop<v128, uint64_t>(IntAnd<uint64_t>));
+ break;
+
+ case Opcode::V128Or:
+ CHECK_TRAP(SimdBinop<v128, uint64_t>(IntOr<uint64_t>));
+ break;
+
+ case Opcode::V128Xor:
+ CHECK_TRAP(SimdBinop<v128, uint64_t>(IntXor<uint64_t>));
+ break;
+
+ case Opcode::V128Not:
+ CHECK_TRAP(SimdUnop<v128, uint64_t>(IntNot<uint64_t>));
+ break;
// The following opcodes are either never generated or should never be
// executed.
case Opcode::Block:
@@ -3021,7 +3043,8 @@ void Thread::Trace(Stream* stream) {
case Opcode::I8X16Neg:
case Opcode::I16X8Neg:
case Opcode::I32X4Neg:
- case Opcode::I64X2Neg: {
+ case Opcode::I64X2Neg:
+ case Opcode::V128Not: {
stream->Writef("%s $0x%08x 0x%08x 0x%08x 0x%08x \n", opcode.GetName(), Top().v128_bits.v[0],
Top().v128_bits.v[1], Top().v128_bits.v[2], Top().v128_bits.v[3]);
break;
@@ -3045,7 +3068,10 @@ void Thread::Trace(Stream* stream) {
case Opcode::I8X16SubSaturateS:
case Opcode::I8X16SubSaturateU:
case Opcode::I16X8SubSaturateS:
- case Opcode::I16X8SubSaturateU: {
+ case Opcode::I16X8SubSaturateU:
+ case Opcode::V128And:
+ case Opcode::V128Or:
+ case Opcode::V128Xor: {
stream->Writef("%s $0x%08x %08x %08x %08x $0x%08x %08x %08x %08x\n", opcode.GetName(), Pick(2).v128_bits.v[0],
Pick(2).v128_bits.v[1], Pick(2).v128_bits.v[2], Pick(2).v128_bits.v[3],Pick(1).v128_bits.v[0],
Pick(1).v128_bits.v[1], Pick(1).v128_bits.v[2], Pick(1).v128_bits.v[3]);
@@ -3399,6 +3425,9 @@ void Environment::Disassemble(Stream* stream,
case Opcode::I32X4ShrU:
case Opcode::I64X2ShrS:
case Opcode::I64X2ShrU:
+ case Opcode::V128And:
+ case Opcode::V128Or:
+ case Opcode::V128Xor:
stream->Writef("%s %%[-2], %%[-1]\n", opcode.GetName());
break;
@@ -3472,6 +3501,7 @@ void Environment::Disassemble(Stream* stream,
case Opcode::I16X8Neg:
case Opcode::I32X4Neg:
case Opcode::I64X2Neg:
+ case Opcode::V128Not:
stream->Writef("%s %%[-1]\n", opcode.GetName());
break;