1 files changed, 52 insertions, 52 deletions

diff --git a/src/opcode.cc b/src/opcode.cc
index 10df4e2e..b388ed3b 100644
--- a/src/opcode.cc
+++ b/src/opcode.cc
@@ -75,14 +75,14 @@ bool Opcode::IsEnabled(const Features& features) const {
     case Opcode::ReturnCall:
       return features.tail_call_enabled();
 
-    case Opcode::I32TruncSSatF32:
-    case Opcode::I32TruncUSatF32:
-    case Opcode::I32TruncSSatF64:
-    case Opcode::I32TruncUSatF64:
-    case Opcode::I64TruncSSatF32:
-    case Opcode::I64TruncUSatF32:
-    case Opcode::I64TruncSSatF64:
-    case Opcode::I64TruncUSatF64:
+    case Opcode::I32TruncSatF32S:
+    case Opcode::I32TruncSatF32U:
+    case Opcode::I32TruncSatF64S:
+    case Opcode::I32TruncSatF64U:
+    case Opcode::I64TruncSatF32S:
+    case Opcode::I64TruncSatF32U:
+    case Opcode::I64TruncSatF64S:
+    case Opcode::I64TruncSatF64U:
       return features.sat_float_to_int_enabled();
 
     case Opcode::I32Extend8S:
@@ -92,7 +92,7 @@ bool Opcode::IsEnabled(const Features& features) const {
     case Opcode::I64Extend32S:
       return features.sign_extension_enabled();
 
-    case Opcode::AtomicWake:
+    case Opcode::AtomicNotify:
     case Opcode::I32AtomicWait:
     case Opcode::I64AtomicWait:
     case Opcode::I32AtomicLoad:
@@ -111,53 +111,53 @@ bool Opcode::IsEnabled(const Features& features) const {
     case Opcode::I64AtomicStore32:
     case Opcode::I32AtomicRmwAdd:
     case Opcode::I64AtomicRmwAdd:
-    case Opcode::I32AtomicRmw8UAdd:
-    case Opcode::I32AtomicRmw16UAdd:
-    case Opcode::I64AtomicRmw8UAdd:
-    case Opcode::I64AtomicRmw16UAdd:
-    case Opcode::I64AtomicRmw32UAdd:
+    case Opcode::I32AtomicRmw8AddU:
+    case Opcode::I32AtomicRmw16AddU:
+    case Opcode::I64AtomicRmw8AddU:
+    case Opcode::I64AtomicRmw16AddU:
+    case Opcode::I64AtomicRmw32AddU:
     case Opcode::I32AtomicRmwSub:
     case Opcode::I64AtomicRmwSub:
-    case Opcode::I32AtomicRmw8USub:
-    case Opcode::I32AtomicRmw16USub:
-    case Opcode::I64AtomicRmw8USub:
-    case Opcode::I64AtomicRmw16USub:
-    case Opcode::I64AtomicRmw32USub:
+    case Opcode::I32AtomicRmw8SubU:
+    case Opcode::I32AtomicRmw16SubU:
+    case Opcode::I64AtomicRmw8SubU:
+    case Opcode::I64AtomicRmw16SubU:
+    case Opcode::I64AtomicRmw32SubU:
     case Opcode::I32AtomicRmwAnd:
     case Opcode::I64AtomicRmwAnd:
-    case Opcode::I32AtomicRmw8UAnd:
-    case Opcode::I32AtomicRmw16UAnd:
-    case Opcode::I64AtomicRmw8UAnd:
-    case Opcode::I64AtomicRmw16UAnd:
-    case Opcode::I64AtomicRmw32UAnd:
+    case Opcode::I32AtomicRmw8AndU:
+    case Opcode::I32AtomicRmw16AndU:
+    case Opcode::I64AtomicRmw8AndU:
+    case Opcode::I64AtomicRmw16AndU:
+    case Opcode::I64AtomicRmw32AndU:
     case Opcode::I32AtomicRmwOr:
     case Opcode::I64AtomicRmwOr:
-    case Opcode::I32AtomicRmw8UOr:
-    case Opcode::I32AtomicRmw16UOr:
-    case Opcode::I64AtomicRmw8UOr:
-    case Opcode::I64AtomicRmw16UOr:
-    case Opcode::I64AtomicRmw32UOr:
+    case Opcode::I32AtomicRmw8OrU:
+    case Opcode::I32AtomicRmw16OrU:
+    case Opcode::I64AtomicRmw8OrU:
+    case Opcode::I64AtomicRmw16OrU:
+    case Opcode::I64AtomicRmw32OrU:
     case Opcode::I32AtomicRmwXor:
     case Opcode::I64AtomicRmwXor:
-    case Opcode::I32AtomicRmw8UXor:
-    case Opcode::I32AtomicRmw16UXor:
-    case Opcode::I64AtomicRmw8UXor:
-    case Opcode::I64AtomicRmw16UXor:
-    case Opcode::I64AtomicRmw32UXor:
+    case Opcode::I32AtomicRmw8XorU:
+    case Opcode::I32AtomicRmw16XorU:
+    case Opcode::I64AtomicRmw8XorU:
+    case Opcode::I64AtomicRmw16XorU:
+    case Opcode::I64AtomicRmw32XorU:
     case Opcode::I32AtomicRmwXchg:
     case Opcode::I64AtomicRmwXchg:
-    case Opcode::I32AtomicRmw8UXchg:
-    case Opcode::I32AtomicRmw16UXchg:
-    case Opcode::I64AtomicRmw8UXchg:
-    case Opcode::I64AtomicRmw16UXchg:
-    case Opcode::I64AtomicRmw32UXchg:
+    case Opcode::I32AtomicRmw8XchgU:
+    case Opcode::I32AtomicRmw16XchgU:
+    case Opcode::I64AtomicRmw8XchgU:
+    case Opcode::I64AtomicRmw16XchgU:
+    case Opcode::I64AtomicRmw32XchgU:
     case Opcode::I32AtomicRmwCmpxchg:
     case Opcode::I64AtomicRmwCmpxchg:
-    case Opcode::I32AtomicRmw8UCmpxchg:
-    case Opcode::I32AtomicRmw16UCmpxchg:
-    case Opcode::I64AtomicRmw8UCmpxchg:
-    case Opcode::I64AtomicRmw16UCmpxchg:
-    case Opcode::I64AtomicRmw32UCmpxchg:
+    case Opcode::I32AtomicRmw8CmpxchgU:
+    case Opcode::I32AtomicRmw16CmpxchgU:
+    case Opcode::I64AtomicRmw8CmpxchgU:
+    case Opcode::I64AtomicRmw16CmpxchgU:
+    case Opcode::I64AtomicRmw32CmpxchgU:
       return features.threads_enabled();
 
     case Opcode::V128Const:
@@ -292,14 +292,14 @@ bool Opcode::IsEnabled(const Features& features) const {
     case Opcode::F64X2Mul:
     case Opcode::F32X4Sqrt:
     case Opcode::F64X2Sqrt:
-    case Opcode::F32X4ConvertSI32X4:
-    case Opcode::F32X4ConvertUI32X4:
-    case Opcode::F64X2ConvertSI64X2:
-    case Opcode::F64X2ConvertUI64X2:
-    case Opcode::I32X4TruncSF32X4Sat:
-    case Opcode::I32X4TruncUF32X4Sat:
-    case Opcode::I64X2TruncSF64X2Sat:
-    case Opcode::I64X2TruncUF64X2Sat:
+    case Opcode::F32X4ConvertI32X4S:
+    case Opcode::F32X4ConvertI32X4U:
+    case Opcode::F64X2ConvertI64X2S:
+    case Opcode::F64X2ConvertI64X2U:
+    case Opcode::I32X4TruncSatF32X4S:
+    case Opcode::I32X4TruncSatF32X4U:
+    case Opcode::I64X2TruncSatF64X2S:
+    case Opcode::I64X2TruncSatF64X2U:
       return features.simd_enabled();
 
     case Opcode::MemoryInit: