From 055ab5e21b1c642a0242daf76837164ef7b8a4a1 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 4 Mar 2021 19:47:46 -0800 Subject: [simd] Rename any_true, implement i64x2 bitmask and all_true (#1624) * Rename all any_true to v128.any_true * Add i64x2.bitmask and i64x2.all_true, rebase simd_boolean * Unskip spec/simd/simd_i16x8_arith2.txt since i64x2.abs is now implemented * Unskip spec/simd/simd_lane.txt * Update dump interp tests, rebase --- src/interp/istream.cc | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src/interp/istream.cc') diff --git a/src/interp/istream.cc b/src/interp/istream.cc index 6e956675..462eb4a5 100644 --- a/src/interp/istream.cc +++ b/src/interp/istream.cc @@ -161,7 +161,6 @@ Instr Istream::Read(Offset* offset) const { case Opcode::F64X2Sqrt: case Opcode::F64X2Trunc: case Opcode::I16X8AllTrue: - case Opcode::I16X8AnyTrue: case Opcode::I16X8Bitmask: case Opcode::I16X8Neg: case Opcode::I16X8Splat: @@ -186,7 +185,6 @@ Instr Istream::Read(Offset* offset) const { case Opcode::I32TruncSatF64U: case Opcode::I32WrapI64: case Opcode::I32X4AllTrue: - case Opcode::I32X4AnyTrue: case Opcode::I32X4Bitmask: case Opcode::I32X4Neg: case Opcode::I32X4Splat: @@ -215,14 +213,16 @@ Instr Istream::Read(Offset* offset) const { case Opcode::I64TruncSatF64S: case Opcode::I64TruncSatF64U: case Opcode::I64X2Neg: + case Opcode::I64X2AllTrue: + case Opcode::I64X2Bitmask: case Opcode::I64X2Splat: case Opcode::I8X16AllTrue: - case Opcode::I8X16AnyTrue: case Opcode::I8X16Bitmask: case Opcode::I8X16Neg: case Opcode::I8X16Splat: case Opcode::RefIsNull: case Opcode::V128Not: + case Opcode::V128AnyTrue: case Opcode::I8X16Abs: case Opcode::I16X8Abs: case Opcode::I32X4Abs: -- cgit v1.2.3