Add v128.load/storeN_lane SIMD instructions to C/JS API (#3784)

Adds C/JS APIs for the SIMD instructions
* Load8LaneVec128 (was LoadLaneVec8x16)
* Load16LaneVec128 (was LoadLaneVec16x8)
* Load32LaneVec128 (was LoadLaneVec32x4)
* Load64LaneVec128 (was LoadLaneVec64x2)
* Store8LaneVec128 (was StoreLaneVec8x16)
* Store16LaneVec128 (was StoreLaneVec16x8)
* Store32LaneVec128 (was StoreLaneVec32x4)
* Store64LaneVec128 (was StoreLaneVec64x2)

17 files changed, 435 insertions, 88 deletions

diff --git a/scripts/gen-s-parser.py b/scripts/gen-s-parser.py
index 569289427..f9f13b355 100755
--- a/scripts/gen-s-parser.py
+++ b/scripts/gen-s-parser.py
@@ -357,14 +357,14 @@ instructions = [
     ("v128.andnot",          "makeBinary(s, BinaryOp::AndNotVec128)"),
     ("v128.any_true",        "makeUnary(s, UnaryOp::AnyTrueVec128)"),
     ("v128.bitselect",       "makeSIMDTernary(s, SIMDTernaryOp::Bitselect)"),
-    ("v128.load8_lane",      "makeSIMDLoadStoreLane(s, LoadLaneVec8x16)"),
-    ("v128.load16_lane",     "makeSIMDLoadStoreLane(s, LoadLaneVec16x8)"),
-    ("v128.load32_lane",     "makeSIMDLoadStoreLane(s, LoadLaneVec32x4)"),
-    ("v128.load64_lane",     "makeSIMDLoadStoreLane(s, LoadLaneVec64x2)"),
-    ("v128.store8_lane",     "makeSIMDLoadStoreLane(s, StoreLaneVec8x16)"),
-    ("v128.store16_lane",    "makeSIMDLoadStoreLane(s, StoreLaneVec16x8)"),
-    ("v128.store32_lane",    "makeSIMDLoadStoreLane(s, StoreLaneVec32x4)"),
-    ("v128.store64_lane",    "makeSIMDLoadStoreLane(s, StoreLaneVec64x2)"),
+    ("v128.load8_lane",      "makeSIMDLoadStoreLane(s, SIMDLoadStoreLaneOp::Load8LaneVec128)"),
+    ("v128.load16_lane",     "makeSIMDLoadStoreLane(s, SIMDLoadStoreLaneOp::Load16LaneVec128)"),
+    ("v128.load32_lane",     "makeSIMDLoadStoreLane(s, SIMDLoadStoreLaneOp::Load32LaneVec128)"),
+    ("v128.load64_lane",     "makeSIMDLoadStoreLane(s, SIMDLoadStoreLaneOp::Load64LaneVec128)"),
+    ("v128.store8_lane",     "makeSIMDLoadStoreLane(s, SIMDLoadStoreLaneOp::Store8LaneVec128)"),
+    ("v128.store16_lane",    "makeSIMDLoadStoreLane(s, SIMDLoadStoreLaneOp::Store16LaneVec128)"),
+    ("v128.store32_lane",    "makeSIMDLoadStoreLane(s, SIMDLoadStoreLaneOp::Store32LaneVec128)"),
+    ("v128.store64_lane",    "makeSIMDLoadStoreLane(s, SIMDLoadStoreLaneOp::Store64LaneVec128)"),
     ("i8x16.popcnt",         "makeUnary(s, UnaryOp::PopcntVecI8x16)"),
     ("i8x16.abs",            "makeUnary(s, UnaryOp::AbsVecI8x16)"),
     ("i8x16.neg",            "makeUnary(s, UnaryOp::NegVecI8x16)"),
diff --git a/src/binaryen-c.cpp b/src/binaryen-c.cpp
index 45201d919..907dbbb8b 100644
--- a/src/binaryen-c.cpp
+++ b/src/binaryen-c.cpp
@@ -689,6 +689,14 @@ BinaryenOp BinaryenLoadExtUVec32x2ToVecI64x2(void) {
 }
 BinaryenOp BinaryenLoad32Zero(void) { return Load32Zero; }
 BinaryenOp BinaryenLoad64Zero(void) { return Load64Zero; }
+BinaryenOp BinaryenLoad8LaneVec128(void) { return Load8LaneVec128; }
+BinaryenOp BinaryenLoad16LaneVec128(void) { return Load16LaneVec128; }
+BinaryenOp BinaryenLoad32LaneVec128(void) { return Load32LaneVec128; }
+BinaryenOp BinaryenLoad64LaneVec128(void) { return Load64LaneVec128; }
+BinaryenOp BinaryenStore8LaneVec128(void) { return Store8LaneVec128; }
+BinaryenOp BinaryenStore16LaneVec128(void) { return Store16LaneVec128; }
+BinaryenOp BinaryenStore32LaneVec128(void) { return Store32LaneVec128; }
+BinaryenOp BinaryenStore64LaneVec128(void) { return Store64LaneVec128; }
 BinaryenOp BinaryenNarrowSVecI16x8ToVecI8x16(void) {
   return NarrowSVecI16x8ToVecI8x16;
 }
@@ -1176,6 +1184,22 @@ BinaryenExpressionRef BinaryenSIMDLoad(BinaryenModuleRef module,
       .makeSIMDLoad(
         SIMDLoadOp(op), Address(offset), Address(align), (Expression*)ptr));
 }
+BinaryenExpressionRef BinaryenSIMDLoadStoreLane(BinaryenModuleRef module,
+                                                BinaryenOp op,
+                                                uint32_t offset,
+                                                uint32_t align,
+                                                uint8_t index,
+                                                BinaryenExpressionRef ptr,
+                                                BinaryenExpressionRef vec) {
+  return static_cast<Expression*>(
+    Builder(*(Module*)module)
+      .makeSIMDLoadStoreLane(SIMDLoadStoreLaneOp(op),
+                             Address(offset),
+                             Address(align),
+                             index,
+                             (Expression*)ptr,
+                             (Expression*)vec));
+}
 BinaryenExpressionRef BinaryenMemoryInit(BinaryenModuleRef module,
                                          uint32_t segment,
                                          BinaryenExpressionRef dest,
diff --git a/src/binaryen-c.h b/src/binaryen-c.h
index da14af22e..252ad70bc 100644
--- a/src/binaryen-c.h
+++ b/src/binaryen-c.h
@@ -560,6 +560,14 @@ BINARYEN_API BinaryenOp BinaryenLoadExtSVec32x2ToVecI64x2(void);
 BINARYEN_API BinaryenOp BinaryenLoadExtUVec32x2ToVecI64x2(void);
 BINARYEN_API BinaryenOp BinaryenLoad32Zero(void);
 BINARYEN_API BinaryenOp BinaryenLoad64Zero(void);
+BINARYEN_API BinaryenOp BinaryenLoad8LaneVec128(void);
+BINARYEN_API BinaryenOp BinaryenLoad16LaneVec128(void);
+BINARYEN_API BinaryenOp BinaryenLoad32LaneVec128(void);
+BINARYEN_API BinaryenOp BinaryenLoad64LaneVec128(void);
+BINARYEN_API BinaryenOp BinaryenStore8LaneVec128(void);
+BINARYEN_API BinaryenOp BinaryenStore16LaneVec128(void);
+BINARYEN_API BinaryenOp BinaryenStore32LaneVec128(void);
+BINARYEN_API BinaryenOp BinaryenStore64LaneVec128(void);
 BINARYEN_API BinaryenOp BinaryenNarrowSVecI16x8ToVecI8x16(void);
 BINARYEN_API BinaryenOp BinaryenNarrowUVecI16x8ToVecI8x16(void);
 BINARYEN_API BinaryenOp BinaryenNarrowSVecI32x4ToVecI16x8(void);
@@ -803,6 +811,14 @@ BINARYEN_API BinaryenExpressionRef BinaryenSIMDLoad(BinaryenModuleRef module,
                                                     uint32_t align,
                                                     BinaryenExpressionRef ptr);
 BINARYEN_API BinaryenExpressionRef
+BinaryenSIMDLoadStoreLane(BinaryenModuleRef module,
+                          BinaryenOp op,
+                          uint32_t offset,
+                          uint32_t align,
+                          uint8_t index,
+                          BinaryenExpressionRef ptr,
+                          BinaryenExpressionRef vec);
+BINARYEN_API BinaryenExpressionRef
 BinaryenMemoryInit(BinaryenModuleRef module,
                    uint32_t segment,
                    BinaryenExpressionRef dest,
diff --git a/src/gen-s-parser.inc b/src/gen-s-parser.inc
index 6dfb92f5f..48b4ec24d 100644
--- a/src/gen-s-parser.inc
+++ b/src/gen-s-parser.inc
@@ -2998,7 +2998,7 @@ switch (op[0]) {
               case '_': {
                 switch (op[12]) {
                   case 'l':
-                    if (strcmp(op, "v128.load16_lane") == 0) { return makeSIMDLoadStoreLane(s, LoadLaneVec16x8); }
+                    if (strcmp(op, "v128.load16_lane") == 0) { return makeSIMDLoadStoreLane(s, SIMDLoadStoreLaneOp::Load16LaneVec128); }
                     goto parse_error;
                   case 's':
                     if (strcmp(op, "v128.load16_splat") == 0) { return makeSIMDLoad(s, SIMDLoadOp::LoadSplatVec16x8); }
@@ -3025,7 +3025,7 @@ switch (op[0]) {
               case '_': {
                 switch (op[12]) {
                   case 'l':
-                    if (strcmp(op, "v128.load32_lane") == 0) { return makeSIMDLoadStoreLane(s, LoadLaneVec32x4); }
+                    if (strcmp(op, "v128.load32_lane") == 0) { return makeSIMDLoadStoreLane(s, SIMDLoadStoreLaneOp::Load32LaneVec128); }
                     goto parse_error;
                   case 's':
                     if (strcmp(op, "v128.load32_splat") == 0) { return makeSIMDLoad(s, SIMDLoadOp::LoadSplatVec32x4); }
@@ -3053,7 +3053,7 @@ switch (op[0]) {
           case '6': {
             switch (op[12]) {
               case 'l':
-                if (strcmp(op, "v128.load64_lane") == 0) { return makeSIMDLoadStoreLane(s, LoadLaneVec64x2); }
+                if (strcmp(op, "v128.load64_lane") == 0) { return makeSIMDLoadStoreLane(s, SIMDLoadStoreLaneOp::Load64LaneVec128); }
                 goto parse_error;
               case 's':
                 if (strcmp(op, "v128.load64_splat") == 0) { return makeSIMDLoad(s, SIMDLoadOp::LoadSplatVec64x2); }
@@ -3069,7 +3069,7 @@ switch (op[0]) {
               case '_': {
                 switch (op[11]) {
                   case 'l':
-                    if (strcmp(op, "v128.load8_lane") == 0) { return makeSIMDLoadStoreLane(s, LoadLaneVec8x16); }
+                    if (strcmp(op, "v128.load8_lane") == 0) { return makeSIMDLoadStoreLane(s, SIMDLoadStoreLaneOp::Load8LaneVec128); }
                     goto parse_error;
                   case 's':
                     if (strcmp(op, "v128.load8_splat") == 0) { return makeSIMDLoad(s, SIMDLoadOp::LoadSplatVec8x16); }
@@ -3106,16 +3106,16 @@ switch (op[0]) {
             if (strcmp(op, "v128.store") == 0) { return makeStore(s, Type::v128, /*isAtomic=*/false); }
             goto parse_error;
           case '1':
-            if (strcmp(op, "v128.store16_lane") == 0) { return makeSIMDLoadStoreLane(s, StoreLaneVec16x8); }
+            if (strcmp(op, "v128.store16_lane") == 0) { return makeSIMDLoadStoreLane(s, SIMDLoadStoreLaneOp::Store16LaneVec128); }
             goto parse_error;
           case '3':
-            if (strcmp(op, "v128.store32_lane") == 0) { return makeSIMDLoadStoreLane(s, StoreLaneVec32x4); }
+            if (strcmp(op, "v128.store32_lane") == 0) { return makeSIMDLoadStoreLane(s, SIMDLoadStoreLaneOp::Store32LaneVec128); }
             goto parse_error;
           case '6':
-            if (strcmp(op, "v128.store64_lane") == 0) { return makeSIMDLoadStoreLane(s, StoreLaneVec64x2); }
+            if (strcmp(op, "v128.store64_lane") == 0) { return makeSIMDLoadStoreLane(s, SIMDLoadStoreLaneOp::Store64LaneVec128); }
             goto parse_error;
           case '8':
-            if (strcmp(op, "v128.store8_lane") == 0) { return makeSIMDLoadStoreLane(s, StoreLaneVec8x16); }
+            if (strcmp(op, "v128.store8_lane") == 0) { return makeSIMDLoadStoreLane(s, SIMDLoadStoreLaneOp::Store8LaneVec128); }
             goto parse_error;
           default: goto parse_error;
         }
diff --git a/src/js/binaryen.js-post.js b/src/js/binaryen.js-post.js
index cfd37e9db..261b20cab 100644
--- a/src/js/binaryen.js-post.js
+++ b/src/js/binaryen.js-post.js
@@ -492,6 +492,14 @@ function initializeConstants() {
     'LoadExtUVec32x2ToVecI64x2',
     'Load32Zero',
     'Load64Zero',
+    'Load8LaneVec128',
+    'Load16LaneVec128',
+    'Load32LaneVec128',
+    'Load64LaneVec128',
+    'Store8LaneVec128',
+    'Store16LaneVec128',
+    'Store32LaneVec128',
+    'Store64LaneVec128',
     'NarrowSVecI16x8ToVecI8x16',
     'NarrowUVecI16x8ToVecI8x16',
     'NarrowSVecI32x4ToVecI16x8',
@@ -1498,6 +1506,30 @@ function wrapModule(module, self = {}) {
     'load64_zero'(offset, align, ptr) {
       return Module['_BinaryenSIMDLoad'](module, Module['Load64Zero'], offset, align, ptr);
     },
+    'load8_lane'(offset, align, index, ptr, vec) {
+      return Module['_BinaryenSIMDLoadStoreLane'](module, Module['Load8LaneVec128'], offset, align, index, ptr, vec);
+    },
+    'load16_lane'(offset, align, index, ptr, vec) {
+      return Module['_BinaryenSIMDLoadStoreLane'](module, Module['Load16LaneVec128'], offset, align, index, ptr, vec);
+    },
+    'load32_lane'(offset, align, index, ptr, vec) {
+      return Module['_BinaryenSIMDLoadStoreLane'](module, Module['Load32LaneVec128'], offset, align, index, ptr, vec);
+    },
+    'load64_lane'(offset, align, index, ptr, vec) {
+      return Module['_BinaryenSIMDLoadStoreLane'](module, Module['Load64LaneVec128'], offset, align, index, ptr, vec);
+    },
+    'store8_lane'(offset, align, index, ptr, vec) {
+      return Module['_BinaryenSIMDLoadStoreLane'](module, Module['Store8LaneVec128'], offset, align, index, ptr, vec);
+    },
+    'store16_lane'(offset, align, index, ptr, vec) {
+      return Module['_BinaryenSIMDLoadStoreLane'](module, Module['Store16LaneVec128'], offset, align, index, ptr, vec);
+    },
+    'store32_lane'(offset, align, index, ptr, vec) {
+      return Module['_BinaryenSIMDLoadStoreLane'](module, Module['Store32LaneVec128'], offset, align, index, ptr, vec);
+    },
+    'store64_lane'(offset, align, index, ptr, vec) {
+      return Module['_BinaryenSIMDLoadStoreLane'](module, Module['Store64LaneVec128'], offset, align, index, ptr, vec);
+    },
     'store'(offset, align, ptr, value) {
       return Module['_BinaryenStore'](module, 16, offset, align, ptr, value, Module['v128']);
     },
diff --git a/src/passes/Print.cpp b/src/passes/Print.cpp
index 929822309..6c401afa6 100644
--- a/src/passes/Print.cpp
+++ b/src/passes/Print.cpp
@@ -747,28 +747,28 @@ struct PrintExpressionContents
   void visitSIMDLoadStoreLane(SIMDLoadStoreLane* curr) {
     prepareColor(o);
     switch (curr->op) {
-      case LoadLaneVec8x16:
+      case Load8LaneVec128:
         o << "v128.load8_lane";
         break;
-      case LoadLaneVec16x8:
+      case Load16LaneVec128:
         o << "v128.load16_lane";
         break;
-      case LoadLaneVec32x4:
+      case Load32LaneVec128:
         o << "v128.load32_lane";
         break;
-      case LoadLaneVec64x2:
+      case Load64LaneVec128:
         o << "v128.load64_lane";
         break;
-      case StoreLaneVec8x16:
+      case Store8LaneVec128:
         o << "v128.store8_lane";
         break;
-      case StoreLaneVec16x8:
+      case Store16LaneVec128:
         o << "v128.store16_lane";
         break;
-      case StoreLaneVec32x4:
+      case Store32LaneVec128:
         o << "v128.store32_lane";
         break;
-      case StoreLaneVec64x2:
+      case Store64LaneVec128:
         o << "v128.store64_lane";
         break;
     }
diff --git a/src/wasm-interpreter.h b/src/wasm-interpreter.h
index 1c8377127..2e464cdb4 100644
--- a/src/wasm-interpreter.h
+++ b/src/wasm-interpreter.h
@@ -2821,8 +2821,8 @@ private:
       }
       Literal vec = flow.getSingleValue();
       switch (curr->op) {
-        case LoadLaneVec8x16:
-        case StoreLaneVec8x16: {
+        case Load8LaneVec128:
+        case Store8LaneVec128: {
           std::array<Literal, 16> lanes = vec.getLanesUI8x16();
           if (curr->isLoad()) {
             lanes[curr->index] =
@@ -2834,8 +2834,8 @@ private:
             return {};
           }
         }
-        case LoadLaneVec16x8:
-        case StoreLaneVec16x8: {
+        case Load16LaneVec128:
+        case Store16LaneVec128: {
           std::array<Literal, 8> lanes = vec.getLanesUI16x8();
           if (curr->isLoad()) {
             lanes[curr->index] =
@@ -2847,8 +2847,8 @@ private:
             return {};
           }
         }
-        case LoadLaneVec32x4:
-        case StoreLaneVec32x4: {
+        case Load32LaneVec128:
+        case Store32LaneVec128: {
           std::array<Literal, 4> lanes = vec.getLanesI32x4();
           if (curr->isLoad()) {
             lanes[curr->index] =
@@ -2860,8 +2860,8 @@ private:
             return {};
           }
         }
-        case StoreLaneVec64x2:
-        case LoadLaneVec64x2: {
+        case Store64LaneVec128:
+        case Load64LaneVec128: {
           std::array<Literal, 2> lanes = vec.getLanesI64x2();
           if (curr->isLoad()) {
             lanes[curr->index] =
diff --git a/src/wasm.h b/src/wasm.h
index dd2643d0b..050240333 100644
--- a/src/wasm.h
+++ b/src/wasm.h
@@ -515,14 +515,14 @@ enum SIMDLoadOp {
 };
 
 enum SIMDLoadStoreLaneOp {
-  LoadLaneVec8x16,
-  LoadLaneVec16x8,
-  LoadLaneVec32x4,
-  LoadLaneVec64x2,
-  StoreLaneVec8x16,
-  StoreLaneVec16x8,
-  StoreLaneVec32x4,
-  StoreLaneVec64x2,
+  Load8LaneVec128,
+  Load16LaneVec128,
+  Load32LaneVec128,
+  Load64LaneVec128,
+  Store8LaneVec128,
+  Store16LaneVec128,
+  Store32LaneVec128,
+  Store64LaneVec128,
 };
 
 enum SIMDTernaryOp {
diff --git a/src/wasm/wasm-binary.cpp b/src/wasm/wasm-binary.cpp
index 14a72bcb4..3ff98187f 100644
--- a/src/wasm/wasm-binary.cpp
+++ b/src/wasm/wasm-binary.cpp
@@ -5897,35 +5897,35 @@ bool WasmBinaryBuilder::maybeVisitSIMDLoadStoreLane(Expression*& out,
   size_t lanes;
   switch (code) {
     case BinaryConsts::V128Load8Lane:
-      op = LoadLaneVec8x16;
+      op = Load8LaneVec128;
       lanes = 16;
       break;
     case BinaryConsts::V128Load16Lane:
-      op = LoadLaneVec16x8;
+      op = Load16LaneVec128;
       lanes = 8;
       break;
     case BinaryConsts::V128Load32Lane:
-      op = LoadLaneVec32x4;
+      op = Load32LaneVec128;
       lanes = 4;
       break;
     case BinaryConsts::V128Load64Lane:
-      op = LoadLaneVec64x2;
+      op = Load64LaneVec128;
       lanes = 2;
       break;
     case BinaryConsts::V128Store8Lane:
-      op = StoreLaneVec8x16;
+      op = Store8LaneVec128;
       lanes = 16;
       break;
     case BinaryConsts::V128Store16Lane:
-      op = StoreLaneVec16x8;
+      op = Store16LaneVec128;
       lanes = 8;
       break;
     case BinaryConsts::V128Store32Lane:
-      op = StoreLaneVec32x4;
+      op = Store32LaneVec128;
       lanes = 4;
       break;
     case BinaryConsts::V128Store64Lane:
-      op = StoreLaneVec64x2;
+      op = Store64LaneVec128;
       lanes = 2;
       break;
     default:
diff --git a/src/wasm/wasm-s-parser.cpp b/src/wasm/wasm-s-parser.cpp
index a1ec5f134..8d1583059 100644
--- a/src/wasm/wasm-s-parser.cpp
+++ b/src/wasm/wasm-s-parser.cpp
@@ -2067,23 +2067,23 @@ SExpressionWasmBuilder::makeSIMDLoadStoreLane(Element& s,
   Address defaultAlign;
   size_t lanes;
   switch (op) {
-    case LoadLaneVec8x16:
-    case StoreLaneVec8x16:
+    case Load8LaneVec128:
+    case Store8LaneVec128:
       defaultAlign = 1;
       lanes = 16;
       break;
-    case LoadLaneVec16x8:
-    case StoreLaneVec16x8:
+    case Load16LaneVec128:
+    case Store16LaneVec128:
       defaultAlign = 2;
       lanes = 8;
       break;
-    case LoadLaneVec32x4:
-    case StoreLaneVec32x4:
+    case Load32LaneVec128:
+    case Store32LaneVec128:
       defaultAlign = 4;
       lanes = 4;
       break;
-    case LoadLaneVec64x2:
-    case StoreLaneVec64x2:
+    case Load64LaneVec128:
+    case Store64LaneVec128:
       defaultAlign = 8;
       lanes = 2;
       break;
diff --git a/src/wasm/wasm-stack.cpp b/src/wasm/wasm-stack.cpp
index 87dfe8247..31b5f1e4e 100644
--- a/src/wasm/wasm-stack.cpp
+++ b/src/wasm/wasm-stack.cpp
@@ -638,28 +638,28 @@ void BinaryInstWriter::visitSIMDLoad(SIMDLoad* curr) {
 void BinaryInstWriter::visitSIMDLoadStoreLane(SIMDLoadStoreLane* curr) {
   o << int8_t(BinaryConsts::SIMDPrefix);
   switch (curr->op) {
-    case LoadLaneVec8x16:
+    case Load8LaneVec128:
       o << U32LEB(BinaryConsts::V128Load8Lane);
       break;
-    case LoadLaneVec16x8:
+    case Load16LaneVec128:
       o << U32LEB(BinaryConsts::V128Load16Lane);
       break;
-    case LoadLaneVec32x4:
+    case Load32LaneVec128:
       o << U32LEB(BinaryConsts::V128Load32Lane);
       break;
-    case LoadLaneVec64x2:
+    case Load64LaneVec128:
       o << U32LEB(BinaryConsts::V128Load64Lane);
       break;
-    case StoreLaneVec8x16:
+    case Store8LaneVec128:
       o << U32LEB(BinaryConsts::V128Store8Lane);
       break;
-    case StoreLaneVec16x8:
+    case Store16LaneVec128:
       o << U32LEB(BinaryConsts::V128Store16Lane);
       break;
-    case StoreLaneVec32x4:
+    case Store32LaneVec128:
       o << U32LEB(BinaryConsts::V128Store32Lane);
       break;
-    case StoreLaneVec64x2:
+    case Store64LaneVec128:
       o << U32LEB(BinaryConsts::V128Store64Lane);
       break;
   }
diff --git a/src/wasm/wasm-validator.cpp b/src/wasm/wasm-validator.cpp
index 3c11f1ee3..8464a3aa9 100644
--- a/src/wasm/wasm-validator.cpp
+++ b/src/wasm/wasm-validator.cpp
@@ -1236,23 +1236,23 @@ void FunctionValidator::visitSIMDLoadStoreLane(SIMDLoadStoreLane* curr) {
   size_t lanes;
   Type memAlignType = Type::none;
   switch (curr->op) {
-    case LoadLaneVec8x16:
-    case StoreLaneVec8x16:
+    case Load8LaneVec128:
+    case Store8LaneVec128:
       lanes = 16;
       memAlignType = Type::i32;
       break;
-    case LoadLaneVec16x8:
-    case StoreLaneVec16x8:
+    case Load16LaneVec128:
+    case Store16LaneVec128:
       lanes = 8;
       memAlignType = Type::i32;
       break;
-    case LoadLaneVec32x4:
-    case StoreLaneVec32x4:
+    case Load32LaneVec128:
+    case Store32LaneVec128:
       lanes = 4;
       memAlignType = Type::i32;
       break;
-    case LoadLaneVec64x2:
-    case StoreLaneVec64x2:
+    case Load64LaneVec128:
+    case Store64LaneVec128:
       lanes = 2;
       memAlignType = Type::i64;
       break;
diff --git a/src/wasm/wasm.cpp b/src/wasm/wasm.cpp
index b227ff99f..5fe5eea4a 100644
--- a/src/wasm/wasm.cpp
+++ b/src/wasm/wasm.cpp
@@ -501,17 +501,17 @@ void SIMDLoadStoreLane::finalize() {
 
 Index SIMDLoadStoreLane::getMemBytes() {
   switch (op) {
-    case LoadLaneVec8x16:
-    case StoreLaneVec8x16:
+    case Load8LaneVec128:
+    case Store8LaneVec128:
       return 1;
-    case LoadLaneVec16x8:
-    case StoreLaneVec16x8:
+    case Load16LaneVec128:
+    case Store16LaneVec128:
       return 2;
-    case LoadLaneVec32x4:
-    case StoreLaneVec32x4:
+    case Load32LaneVec128:
+    case Store32LaneVec128:
       return 4;
-    case LoadLaneVec64x2:
-    case StoreLaneVec64x2:
+    case Load64LaneVec128:
+    case Store64LaneVec128:
       return 8;
   }
   WASM_UNREACHABLE("unexpected op");
@@ -519,15 +519,15 @@ Index SIMDLoadStoreLane::getMemBytes() {
 
 bool SIMDLoadStoreLane::isStore() {
   switch (op) {
-    case StoreLaneVec8x16:
-    case StoreLaneVec16x8:
-    case StoreLaneVec32x4:
-    case StoreLaneVec64x2:
+    case Store8LaneVec128:
+    case Store16LaneVec128:
+    case Store32LaneVec128:
+    case Store64LaneVec128:
       return true;
-    case LoadLaneVec16x8:
-    case LoadLaneVec32x4:
-    case LoadLaneVec64x2:
-    case LoadLaneVec8x16:
+    case Load16LaneVec128:
+    case Load32LaneVec128:
+    case Load64LaneVec128:
+    case Load8LaneVec128:
       return false;
   }
   WASM_UNREACHABLE("unexpected op");
diff --git a/test/binaryen.js/kitchen-sink.js b/test/binaryen.js/kitchen-sink.js
index 76193b0bf..0798741cf 100644
--- a/test/binaryen.js/kitchen-sink.js
+++ b/test/binaryen.js/kitchen-sink.js
@@ -517,6 +517,23 @@ function test_core() {
     module.v128.load32x2_u(0, 8, module.i32.const(128)),
     module.v128.load32_zero(0, 4, module.i32.const(128)),
     module.v128.load64_zero(0, 8, module.i32.const(128)),
+    // SIMD load/store lane
+    module.v128.load8_lane(0, 1, 0, module.i32.const(128), module.v128.const(v128_bytes)),
+    module.v128.load8_lane(1, 1, 15, module.i32.const(128), module.v128.const(v128_bytes)),
+    module.v128.load16_lane(0, 2, 0, module.i32.const(128), module.v128.const(v128_bytes)),
+    module.v128.load16_lane(2, 1, 7, module.i32.const(128), module.v128.const(v128_bytes)),
+    module.v128.load32_lane(0, 4, 0, module.i32.const(128), module.v128.const(v128_bytes)),
+    module.v128.load32_lane(4, 2, 3, module.i32.const(128), module.v128.const(v128_bytes)),
+    module.v128.load64_lane(0, 8, 0, module.i32.const(128), module.v128.const(v128_bytes)),
+    module.v128.load64_lane(8, 4, 1, module.i32.const(128), module.v128.const(v128_bytes)),
+    module.v128.store8_lane(0, 1, 0, module.i32.const(128), module.v128.const(v128_bytes)),
+    module.v128.store8_lane(1, 1, 15, module.i32.const(128), module.v128.const(v128_bytes)),
+    module.v128.store16_lane(0, 2, 0, module.i32.const(128), module.v128.const(v128_bytes)),
+    module.v128.store16_lane(2, 1, 7, module.i32.const(128), module.v128.const(v128_bytes)),
+    module.v128.store32_lane(0, 4, 0, module.i32.const(128), module.v128.const(v128_bytes)),
+    module.v128.store32_lane(4, 2, 3, module.i32.const(128), module.v128.const(v128_bytes)),
+    module.v128.store64_lane(0, 8, 0, module.i32.const(128), module.v128.const(v128_bytes)),
+    module.v128.store64_lane(8, 4, 1, module.i32.const(128), module.v128.const(v128_bytes)),
     // Other SIMD
     module.i8x16.shuffle(module.v128.const(v128_bytes), module.v128.const(v128_bytes), v128_bytes),
     module.v128.bitselect(module.v128.const(v128_bytes), module.v128.const(v128_bytes), module.v128.const(v128_bytes)),
diff --git a/test/binaryen.js/kitchen-sink.js.txt b/test/binaryen.js/kitchen-sink.js.txt
index c835fe299..623a8207c 100644
--- a/test/binaryen.js/kitchen-sink.js.txt
+++ b/test/binaryen.js/kitchen-sink.js.txt
@@ -1812,6 +1812,86 @@ getExpressionInfo(tuple[3])={"id":14,"type":5,"value":3.7}
        )
       )
       (drop
+       (v128.load8_lane 0
+        (i32.const 128)
+        (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+       )
+      )
+      (drop
+       (v128.load8_lane offset=1 15
+        (i32.const 128)
+        (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+       )
+      )
+      (drop
+       (v128.load16_lane 0
+        (i32.const 128)
+        (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+       )
+      )
+      (drop
+       (v128.load16_lane offset=2 align=1 7
+        (i32.const 128)
+        (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+       )
+      )
+      (drop
+       (v128.load32_lane 0
+        (i32.const 128)
+        (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+       )
+      )
+      (drop
+       (v128.load32_lane offset=4 align=2 3
+        (i32.const 128)
+        (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+       )
+      )
+      (drop
+       (v128.load64_lane 0
+        (i32.const 128)
+        (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+       )
+      )
+      (drop
+       (v128.load64_lane offset=8 align=4 1
+        (i32.const 128)
+        (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+       )
+      )
+      (v128.store8_lane 0
+       (i32.const 128)
+       (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+      )
+      (v128.store8_lane offset=1 15
+       (i32.const 128)
+       (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+      )
+      (v128.store16_lane 0
+       (i32.const 128)
+       (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+      )
+      (v128.store16_lane offset=2 align=1 7
+       (i32.const 128)
+       (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+      )
+      (v128.store32_lane 0
+       (i32.const 128)
+       (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+      )
+      (v128.store32_lane offset=4 align=2 3
+       (i32.const 128)
+       (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+      )
+      (v128.store64_lane 0
+       (i32.const 128)
+       (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+      )
+      (v128.store64_lane offset=8 align=4 1
+       (i32.const 128)
+       (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+      )
+      (drop
        (i8x16.shuffle 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
         (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
         (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
@@ -3824,6 +3904,86 @@ getExpressionInfo(tuple[3])={"id":14,"type":5,"value":3.7}
        )
       )
       (drop
+       (v128.load8_lane 0
+        (i32.const 128)
+        (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+       )
+      )
+      (drop
+       (v128.load8_lane offset=1 15
+        (i32.const 128)
+        (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+       )
+      )
+      (drop
+       (v128.load16_lane 0
+        (i32.const 128)
+        (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+       )
+      )
+      (drop
+       (v128.load16_lane offset=2 align=1 7
+        (i32.const 128)
+        (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+       )
+      )
+      (drop
+       (v128.load32_lane 0
+        (i32.const 128)
+        (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+       )
+      )
+      (drop
+       (v128.load32_lane offset=4 align=2 3
+        (i32.const 128)
+        (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+       )
+      )
+      (drop
+       (v128.load64_lane 0
+        (i32.const 128)
+        (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+       )
+      )
+      (drop
+       (v128.load64_lane offset=8 align=4 1
+        (i32.const 128)
+        (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+       )
+      )
+      (v128.store8_lane 0
+       (i32.const 128)
+       (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+      )
+      (v128.store8_lane offset=1 15
+       (i32.const 128)
+       (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+      )
+      (v128.store16_lane 0
+       (i32.const 128)
+       (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+      )
+      (v128.store16_lane offset=2 align=1 7
+       (i32.const 128)
+       (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+      )
+      (v128.store32_lane 0
+       (i32.const 128)
+       (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+      )
+      (v128.store32_lane offset=4 align=2 3
+       (i32.const 128)
+       (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+      )
+      (v128.store64_lane 0
+       (i32.const 128)
+       (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+      )
+      (v128.store64_lane offset=8 align=4 1
+       (i32.const 128)
+       (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+      )
+      (drop
        (i8x16.shuffle 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
         (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
         (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
diff --git a/test/example/c-api-kitchen-sink.c b/test/example/c-api-kitchen-sink.c
index bbffb1ea2..2dc167adc 100644
--- a/test/example/c-api-kitchen-sink.c
+++ b/test/example/c-api-kitchen-sink.c
@@ -685,6 +685,64 @@ void test_core() {
                      0,
                      8,
                      makeInt32(module, 128)),
+    // SIMD load/store lane
+    BinaryenSIMDLoadStoreLane(module,
+                              BinaryenLoad8LaneVec128(),
+                              0,
+                              1,
+                              0,
+                              makeInt32(module, 128),
+                              makeVec128(module, v128_bytes)),
+    BinaryenSIMDLoadStoreLane(module,
+                              BinaryenLoad16LaneVec128(),
+                              0,
+                              2,
+                              0,
+                              makeInt32(module, 128),
+                              makeVec128(module, v128_bytes)),
+    BinaryenSIMDLoadStoreLane(module,
+                              BinaryenLoad32LaneVec128(),
+                              0,
+                              4,
+                              0,
+                              makeInt32(module, 128),
+                              makeVec128(module, v128_bytes)),
+    BinaryenSIMDLoadStoreLane(module,
+                              BinaryenLoad64LaneVec128(),
+                              0,
+                              8,
+                              0,
+                              makeInt32(module, 128),
+                              makeVec128(module, v128_bytes)),
+
+    BinaryenSIMDLoadStoreLane(module,
+                              BinaryenStore8LaneVec128(),
+                              0,
+                              1,
+                              0,
+                              makeInt32(module, 128),
+                              makeVec128(module, v128_bytes)),
+    BinaryenSIMDLoadStoreLane(module,
+                              BinaryenStore16LaneVec128(),
+                              0,
+                              2,
+                              0,
+                              makeInt32(module, 128),
+                              makeVec128(module, v128_bytes)),
+    BinaryenSIMDLoadStoreLane(module,
+                              BinaryenStore32LaneVec128(),
+                              0,
+                              4,
+                              0,
+                              makeInt32(module, 128),
+                              makeVec128(module, v128_bytes)),
+    BinaryenSIMDLoadStoreLane(module,
+                              BinaryenStore64LaneVec128(),
+                              0,
+                              8,
+                              0,
+                              makeInt32(module, 128),
+                              makeVec128(module, v128_bytes)),
     // Other SIMD
     makeSIMDShuffle(module),
     makeSIMDTernary(module, BinaryenBitselectVec128()),
diff --git a/test/example/c-api-kitchen-sink.txt b/test/example/c-api-kitchen-sink.txt
index 16dde8c00..0bdec4c37 100644
--- a/test/example/c-api-kitchen-sink.txt
+++ b/test/example/c-api-kitchen-sink.txt
@@ -1722,6 +1722,46 @@ BinaryenFeatureAll: 8191
        )
       )
       (drop
+       (v128.load8_lane 0
+        (i32.const 128)
+        (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+       )
+      )
+      (drop
+       (v128.load16_lane 0
+        (i32.const 128)
+        (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+       )
+      )
+      (drop
+       (v128.load32_lane 0
+        (i32.const 128)
+        (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+       )
+      )
+      (drop
+       (v128.load64_lane 0
+        (i32.const 128)
+        (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+       )
+      )
+      (v128.store8_lane 0
+       (i32.const 128)
+       (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+      )
+      (v128.store16_lane 0
+       (i32.const 128)
+       (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+      )
+      (v128.store32_lane 0
+       (i32.const 128)
+       (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+      )
+      (v128.store64_lane 0
+       (i32.const 128)
+       (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
+      )
+      (drop
        (i8x16.shuffle 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
         (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)
         (v128.const i32x4 0x04030201 0x08070605 0x0c0b0a09 0x100f0e0d)