Update SIMD names and opcodes (#3771)

Also removes experimental SIMD instructions that were not included in the final
spec proposal.

1 files changed, 42 insertions, 55 deletions

diff --git a/scripts/gen-s-parser.py b/scripts/gen-s-parser.py
index c65e5ddc4..569289427 100755
--- a/scripts/gen-s-parser.py
+++ b/scripts/gen-s-parser.py
@@ -281,7 +281,7 @@ instructions = [
     ("v128.load",            "makeLoad(s, Type::v128, /*isAtomic=*/false)"),
     ("v128.store",           "makeStore(s, Type::v128, /*isAtomic=*/false)"),
     ("v128.const",           "makeConst(s, Type::v128)"),
-    ("v8x16.shuffle",        "makeSIMDShuffle(s)"),
+    ("i8x16.shuffle",        "makeSIMDShuffle(s)"),
     ("i8x16.splat",          "makeUnary(s, UnaryOp::SplatVecI8x16)"),
     ("i8x16.extract_lane_s", "makeSIMDExtract(s, SIMDExtractOp::ExtractLaneSVecI8x16, 16)"),
     ("i8x16.extract_lane_u", "makeSIMDExtract(s, SIMDExtractOp::ExtractLaneUVecI8x16, 16)"),
@@ -333,6 +333,11 @@ instructions = [
     ("i32x4.ge_s",           "makeBinary(s, BinaryOp::GeSVecI32x4)"),
     ("i32x4.ge_u",           "makeBinary(s, BinaryOp::GeUVecI32x4)"),
     ("i64x2.eq",             "makeBinary(s, BinaryOp::EqVecI64x2)"),
+    ("i64x2.ne",             "makeBinary(s, BinaryOp::NeVecI64x2)"),
+    ("i64x2.lt_s",           "makeBinary(s, BinaryOp::LtSVecI64x2)"),
+    ("i64x2.gt_s",           "makeBinary(s, BinaryOp::GtSVecI64x2)"),
+    ("i64x2.le_s",           "makeBinary(s, BinaryOp::LeSVecI64x2)"),
+    ("i64x2.ge_s",           "makeBinary(s, BinaryOp::GeSVecI64x2)"),
     ("f32x4.eq",             "makeBinary(s, BinaryOp::EqVecF32x4)"),
     ("f32x4.ne",             "makeBinary(s, BinaryOp::NeVecF32x4)"),
     ("f32x4.lt",             "makeBinary(s, BinaryOp::LtVecF32x4)"),
@@ -350,11 +355,8 @@ instructions = [
     ("v128.or",              "makeBinary(s, BinaryOp::OrVec128)"),
     ("v128.xor",             "makeBinary(s, BinaryOp::XorVec128)"),
     ("v128.andnot",          "makeBinary(s, BinaryOp::AndNotVec128)"),
+    ("v128.any_true",        "makeUnary(s, UnaryOp::AnyTrueVec128)"),
     ("v128.bitselect",       "makeSIMDTernary(s, SIMDTernaryOp::Bitselect)"),
-    ("v8x16.signselect",     "makeSIMDTernary(s, SIMDTernaryOp::SignSelectVec8x16)"),
-    ("v16x8.signselect",     "makeSIMDTernary(s, SIMDTernaryOp::SignSelectVec16x8)"),
-    ("v32x4.signselect",     "makeSIMDTernary(s, SIMDTernaryOp::SignSelectVec32x4)"),
-    ("v64x2.signselect",     "makeSIMDTernary(s, SIMDTernaryOp::SignSelectVec64x2)"),
     ("v128.load8_lane",      "makeSIMDLoadStoreLane(s, LoadLaneVec8x16)"),
     ("v128.load16_lane",     "makeSIMDLoadStoreLane(s, LoadLaneVec16x8)"),
     ("v128.load32_lane",     "makeSIMDLoadStoreLane(s, LoadLaneVec32x4)"),
@@ -366,19 +368,17 @@ instructions = [
     ("i8x16.popcnt",         "makeUnary(s, UnaryOp::PopcntVecI8x16)"),
     ("i8x16.abs",            "makeUnary(s, UnaryOp::AbsVecI8x16)"),
     ("i8x16.neg",            "makeUnary(s, UnaryOp::NegVecI8x16)"),
-    ("i8x16.any_true",       "makeUnary(s, UnaryOp::AnyTrueVecI8x16)"),
     ("i8x16.all_true",       "makeUnary(s, UnaryOp::AllTrueVecI8x16)"),
     ("i8x16.bitmask",        "makeUnary(s, UnaryOp::BitmaskVecI8x16)"),
     ("i8x16.shl",            "makeSIMDShift(s, SIMDShiftOp::ShlVecI8x16)"),
     ("i8x16.shr_s",          "makeSIMDShift(s, SIMDShiftOp::ShrSVecI8x16)"),
     ("i8x16.shr_u",          "makeSIMDShift(s, SIMDShiftOp::ShrUVecI8x16)"),
     ("i8x16.add",            "makeBinary(s, BinaryOp::AddVecI8x16)"),
-    ("i8x16.add_saturate_s", "makeBinary(s, BinaryOp::AddSatSVecI8x16)"),
-    ("i8x16.add_saturate_u", "makeBinary(s, BinaryOp::AddSatUVecI8x16)"),
+    ("i8x16.add_sat_s",      "makeBinary(s, BinaryOp::AddSatSVecI8x16)"),
+    ("i8x16.add_sat_u",      "makeBinary(s, BinaryOp::AddSatUVecI8x16)"),
     ("i8x16.sub",            "makeBinary(s, BinaryOp::SubVecI8x16)"),
-    ("i8x16.sub_saturate_s", "makeBinary(s, BinaryOp::SubSatSVecI8x16)"),
-    ("i8x16.sub_saturate_u", "makeBinary(s, BinaryOp::SubSatUVecI8x16)"),
-    ("i8x16.mul",            "makeBinary(s, BinaryOp::MulVecI8x16)"),
+    ("i8x16.sub_sat_s",      "makeBinary(s, BinaryOp::SubSatSVecI8x16)"),
+    ("i8x16.sub_sat_u",      "makeBinary(s, BinaryOp::SubSatUVecI8x16)"),
     ("i8x16.min_s",          "makeBinary(s, BinaryOp::MinSVecI8x16)"),
     ("i8x16.min_u",          "makeBinary(s, BinaryOp::MinUVecI8x16)"),
     ("i8x16.max_s",          "makeBinary(s, BinaryOp::MaxSVecI8x16)"),
@@ -386,18 +386,17 @@ instructions = [
     ("i8x16.avgr_u",         "makeBinary(s, BinaryOp::AvgrUVecI8x16)"),
     ("i16x8.abs",            "makeUnary(s, UnaryOp::AbsVecI16x8)"),
     ("i16x8.neg",            "makeUnary(s, UnaryOp::NegVecI16x8)"),
-    ("i16x8.any_true",       "makeUnary(s, UnaryOp::AnyTrueVecI16x8)"),
     ("i16x8.all_true",       "makeUnary(s, UnaryOp::AllTrueVecI16x8)"),
     ("i16x8.bitmask",        "makeUnary(s, UnaryOp::BitmaskVecI16x8)"),
     ("i16x8.shl",            "makeSIMDShift(s, SIMDShiftOp::ShlVecI16x8)"),
     ("i16x8.shr_s",          "makeSIMDShift(s, SIMDShiftOp::ShrSVecI16x8)"),
     ("i16x8.shr_u",          "makeSIMDShift(s, SIMDShiftOp::ShrUVecI16x8)"),
     ("i16x8.add",            "makeBinary(s, BinaryOp::AddVecI16x8)"),
-    ("i16x8.add_saturate_s", "makeBinary(s, BinaryOp::AddSatSVecI16x8)"),
-    ("i16x8.add_saturate_u", "makeBinary(s, BinaryOp::AddSatUVecI16x8)"),
+    ("i16x8.add_sat_s",      "makeBinary(s, BinaryOp::AddSatSVecI16x8)"),
+    ("i16x8.add_sat_u",      "makeBinary(s, BinaryOp::AddSatUVecI16x8)"),
     ("i16x8.sub",            "makeBinary(s, BinaryOp::SubVecI16x8)"),
-    ("i16x8.sub_saturate_s", "makeBinary(s, BinaryOp::SubSatSVecI16x8)"),
-    ("i16x8.sub_saturate_u", "makeBinary(s, BinaryOp::SubSatUVecI16x8)"),
+    ("i16x8.sub_sat_s",      "makeBinary(s, BinaryOp::SubSatSVecI16x8)"),
+    ("i16x8.sub_sat_u",      "makeBinary(s, BinaryOp::SubSatUVecI16x8)"),
     ("i16x8.mul",            "makeBinary(s, BinaryOp::MulVecI16x8)"),
     ("i16x8.min_s",          "makeBinary(s, BinaryOp::MinSVecI16x8)"),
     ("i16x8.min_u",          "makeBinary(s, BinaryOp::MinUVecI16x8)"),
@@ -411,7 +410,6 @@ instructions = [
     ("i16x8.extmul_high_i8x16_u", "makeBinary(s, BinaryOp::ExtMulHighUVecI16x8)"),
     ("i32x4.abs",            "makeUnary(s, UnaryOp::AbsVecI32x4)"),
     ("i32x4.neg",            "makeUnary(s, UnaryOp::NegVecI32x4)"),
-    ("i32x4.any_true",       "makeUnary(s, UnaryOp::AnyTrueVecI32x4)"),
     ("i32x4.all_true",       "makeUnary(s, UnaryOp::AllTrueVecI32x4)"),
     ("i32x4.bitmask",        "makeUnary(s, UnaryOp::BitmaskVecI32x4)"),
     ("i32x4.shl",            "makeSIMDShift(s, SIMDShiftOp::ShlVecI32x4)"),
@@ -429,7 +427,9 @@ instructions = [
     ("i32x4.extmul_high_i16x8_s", "makeBinary(s, BinaryOp::ExtMulHighSVecI32x4)"),
     ("i32x4.extmul_low_i16x8_u", "makeBinary(s, BinaryOp::ExtMulLowUVecI32x4)"),
     ("i32x4.extmul_high_i16x8_u", "makeBinary(s, BinaryOp::ExtMulHighUVecI32x4)"),
+    ("i64x2.abs",            "makeUnary(s, UnaryOp::AbsVecI64x2)"),
     ("i64x2.neg",            "makeUnary(s, UnaryOp::NegVecI64x2)"),
+    ("i64x2.all_true",       "makeUnary(s, UnaryOp::AllTrueVecI64x2)"),
     ("i64x2.bitmask",        "makeUnary(s, UnaryOp::BitmaskVecI64x2)"),
     ("i64x2.shl",            "makeSIMDShift(s, SIMDShiftOp::ShlVecI64x2)"),
     ("i64x2.shr_s",          "makeSIMDShift(s, SIMDShiftOp::ShrSVecI64x2)"),
@@ -444,8 +444,6 @@ instructions = [
     ("f32x4.abs",            "makeUnary(s, UnaryOp::AbsVecF32x4)"),
     ("f32x4.neg",            "makeUnary(s, UnaryOp::NegVecF32x4)"),
     ("f32x4.sqrt",           "makeUnary(s, UnaryOp::SqrtVecF32x4)"),
-    ("f32x4.qfma",           "makeSIMDTernary(s, SIMDTernaryOp::QFMAF32x4)"),
-    ("f32x4.qfms",           "makeSIMDTernary(s, SIMDTernaryOp::QFMSF32x4)"),
     ("f32x4.add",            "makeBinary(s, BinaryOp::AddVecF32x4)"),
     ("f32x4.sub",            "makeBinary(s, BinaryOp::SubVecF32x4)"),
     ("f32x4.mul",            "makeBinary(s, BinaryOp::MulVecF32x4)"),
@@ -461,8 +459,6 @@ instructions = [
     ("f64x2.abs",            "makeUnary(s, UnaryOp::AbsVecF64x2)"),
     ("f64x2.neg",            "makeUnary(s, UnaryOp::NegVecF64x2)"),
     ("f64x2.sqrt",           "makeUnary(s, UnaryOp::SqrtVecF64x2)"),
-    ("f64x2.qfma",           "makeSIMDTernary(s, SIMDTernaryOp::QFMAF64x2)"),
-    ("f64x2.qfms",           "makeSIMDTernary(s, SIMDTernaryOp::QFMSF64x2)"),
     ("f64x2.add",            "makeBinary(s, BinaryOp::AddVecF64x2)"),
     ("f64x2.sub",            "makeBinary(s, BinaryOp::SubVecF64x2)"),
     ("f64x2.mul",            "makeBinary(s, BinaryOp::MulVecF64x2)"),
@@ -477,57 +473,48 @@ instructions = [
     ("f64x2.nearest",        "makeUnary(s, UnaryOp::NearestVecF64x2)"),
     ("i32x4.trunc_sat_f32x4_s",  "makeUnary(s, UnaryOp::TruncSatSVecF32x4ToVecI32x4)"),
     ("i32x4.trunc_sat_f32x4_u",  "makeUnary(s, UnaryOp::TruncSatUVecF32x4ToVecI32x4)"),
-    ("i64x2.trunc_sat_f64x2_s",  "makeUnary(s, UnaryOp::TruncSatSVecF64x2ToVecI64x2)"),
-    ("i64x2.trunc_sat_f64x2_u",  "makeUnary(s, UnaryOp::TruncSatUVecF64x2ToVecI64x2)"),
     ("f32x4.convert_i32x4_s",    "makeUnary(s, UnaryOp::ConvertSVecI32x4ToVecF32x4)"),
     ("f32x4.convert_i32x4_u",    "makeUnary(s, UnaryOp::ConvertUVecI32x4ToVecF32x4)"),
-    ("f64x2.convert_i64x2_s",    "makeUnary(s, UnaryOp::ConvertSVecI64x2ToVecF64x2)"),
-    ("f64x2.convert_i64x2_u",    "makeUnary(s, UnaryOp::ConvertUVecI64x2ToVecF64x2)"),
-    ("v8x16.load_splat",         "makeSIMDLoad(s, SIMDLoadOp::LoadSplatVec8x16)"),
-    ("v16x8.load_splat",         "makeSIMDLoad(s, SIMDLoadOp::LoadSplatVec16x8)"),
-    ("v32x4.load_splat",         "makeSIMDLoad(s, SIMDLoadOp::LoadSplatVec32x4)"),
-    ("v64x2.load_splat",         "makeSIMDLoad(s, SIMDLoadOp::LoadSplatVec64x2)"),
-    ("i16x8.load8x8_s",          "makeSIMDLoad(s, SIMDLoadOp::LoadExtSVec8x8ToVecI16x8)"),
-    ("i16x8.load8x8_u",          "makeSIMDLoad(s, SIMDLoadOp::LoadExtUVec8x8ToVecI16x8)"),
-    ("i32x4.load16x4_s",         "makeSIMDLoad(s, SIMDLoadOp::LoadExtSVec16x4ToVecI32x4)"),
-    ("i32x4.load16x4_u",         "makeSIMDLoad(s, SIMDLoadOp::LoadExtUVec16x4ToVecI32x4)"),
-    ("i64x2.load32x2_s",         "makeSIMDLoad(s, SIMDLoadOp::LoadExtSVec32x2ToVecI64x2)"),
-    ("i64x2.load32x2_u",         "makeSIMDLoad(s, SIMDLoadOp::LoadExtUVec32x2ToVecI64x2)"),
+    ("v128.load8_splat",         "makeSIMDLoad(s, SIMDLoadOp::LoadSplatVec8x16)"),
+    ("v128.load16_splat",        "makeSIMDLoad(s, SIMDLoadOp::LoadSplatVec16x8)"),
+    ("v128.load32_splat",        "makeSIMDLoad(s, SIMDLoadOp::LoadSplatVec32x4)"),
+    ("v128.load64_splat",        "makeSIMDLoad(s, SIMDLoadOp::LoadSplatVec64x2)"),
+    ("v128.load8x8_s",           "makeSIMDLoad(s, SIMDLoadOp::LoadExtSVec8x8ToVecI16x8)"),
+    ("v128.load8x8_u",           "makeSIMDLoad(s, SIMDLoadOp::LoadExtUVec8x8ToVecI16x8)"),
+    ("v128.load16x4_s",          "makeSIMDLoad(s, SIMDLoadOp::LoadExtSVec16x4ToVecI32x4)"),
+    ("v128.load16x4_u",          "makeSIMDLoad(s, SIMDLoadOp::LoadExtUVec16x4ToVecI32x4)"),
+    ("v128.load32x2_s",          "makeSIMDLoad(s, SIMDLoadOp::LoadExtSVec32x2ToVecI64x2)"),
+    ("v128.load32x2_u",          "makeSIMDLoad(s, SIMDLoadOp::LoadExtUVec32x2ToVecI64x2)"),
     ("v128.load32_zero",         "makeSIMDLoad(s, SIMDLoadOp::Load32Zero)"),
     ("v128.load64_zero",         "makeSIMDLoad(s, SIMDLoadOp::Load64Zero)"),
     ("i8x16.narrow_i16x8_s",     "makeBinary(s, BinaryOp::NarrowSVecI16x8ToVecI8x16)"),
     ("i8x16.narrow_i16x8_u",     "makeBinary(s, BinaryOp::NarrowUVecI16x8ToVecI8x16)"),
     ("i16x8.narrow_i32x4_s",     "makeBinary(s, BinaryOp::NarrowSVecI32x4ToVecI16x8)"),
     ("i16x8.narrow_i32x4_u",     "makeBinary(s, BinaryOp::NarrowUVecI32x4ToVecI16x8)"),
-    ("i16x8.widen_low_i8x16_s",  "makeUnary(s, UnaryOp::WidenLowSVecI8x16ToVecI16x8)"),
-    ("i16x8.widen_high_i8x16_s", "makeUnary(s, UnaryOp::WidenHighSVecI8x16ToVecI16x8)"),
-    ("i16x8.widen_low_i8x16_u",  "makeUnary(s, UnaryOp::WidenLowUVecI8x16ToVecI16x8)"),
-    ("i16x8.widen_high_i8x16_u", "makeUnary(s, UnaryOp::WidenHighUVecI8x16ToVecI16x8)"),
-    ("i32x4.widen_low_i16x8_s",  "makeUnary(s, UnaryOp::WidenLowSVecI16x8ToVecI32x4)"),
-    ("i32x4.widen_high_i16x8_s", "makeUnary(s, UnaryOp::WidenHighSVecI16x8ToVecI32x4)"),
-    ("i32x4.widen_low_i16x8_u",  "makeUnary(s, UnaryOp::WidenLowUVecI16x8ToVecI32x4)"),
-    ("i32x4.widen_high_i16x8_u", "makeUnary(s, UnaryOp::WidenHighUVecI16x8ToVecI32x4)"),
-    ("i64x2.widen_low_i32x4_s",  "makeUnary(s, UnaryOp::WidenLowSVecI32x4ToVecI64x2)"),
-    ("i64x2.widen_high_i32x4_s", "makeUnary(s, UnaryOp::WidenHighSVecI32x4ToVecI64x2)"),
-    ("i64x2.widen_low_i32x4_u",  "makeUnary(s, UnaryOp::WidenLowUVecI32x4ToVecI64x2)"),
-    ("i64x2.widen_high_i32x4_u", "makeUnary(s, UnaryOp::WidenHighUVecI32x4ToVecI64x2)"),
-    ("v8x16.swizzle",            "makeBinary(s, BinaryOp::SwizzleVec8x16)"),
+    ("i16x8.extend_low_i8x16_s",  "makeUnary(s, UnaryOp::ExtendLowSVecI8x16ToVecI16x8)"),
+    ("i16x8.extend_high_i8x16_s", "makeUnary(s, UnaryOp::ExtendHighSVecI8x16ToVecI16x8)"),
+    ("i16x8.extend_low_i8x16_u",  "makeUnary(s, UnaryOp::ExtendLowUVecI8x16ToVecI16x8)"),
+    ("i16x8.extend_high_i8x16_u", "makeUnary(s, UnaryOp::ExtendHighUVecI8x16ToVecI16x8)"),
+    ("i32x4.extend_low_i16x8_s",  "makeUnary(s, UnaryOp::ExtendLowSVecI16x8ToVecI32x4)"),
+    ("i32x4.extend_high_i16x8_s", "makeUnary(s, UnaryOp::ExtendHighSVecI16x8ToVecI32x4)"),
+    ("i32x4.extend_low_i16x8_u",  "makeUnary(s, UnaryOp::ExtendLowUVecI16x8ToVecI32x4)"),
+    ("i32x4.extend_high_i16x8_u", "makeUnary(s, UnaryOp::ExtendHighUVecI16x8ToVecI32x4)"),
+    ("i64x2.extend_low_i32x4_s",  "makeUnary(s, UnaryOp::ExtendLowSVecI32x4ToVecI64x2)"),
+    ("i64x2.extend_high_i32x4_s", "makeUnary(s, UnaryOp::ExtendHighSVecI32x4ToVecI64x2)"),
+    ("i64x2.extend_low_i32x4_u",  "makeUnary(s, UnaryOp::ExtendLowUVecI32x4ToVecI64x2)"),
+    ("i64x2.extend_high_i32x4_u", "makeUnary(s, UnaryOp::ExtendHighUVecI32x4ToVecI64x2)"),
+    ("i8x16.swizzle",             "makeBinary(s, BinaryOp::SwizzleVec8x16)"),
     ("i16x8.extadd_pairwise_i8x16_s", "makeUnary(s, UnaryOp::ExtAddPairwiseSVecI8x16ToI16x8)"),
     ("i16x8.extadd_pairwise_i8x16_u", "makeUnary(s, UnaryOp::ExtAddPairwiseUVecI8x16ToI16x8)"),
     ("i32x4.extadd_pairwise_i16x8_s", "makeUnary(s, UnaryOp::ExtAddPairwiseSVecI16x8ToI32x4)"),
     ("i32x4.extadd_pairwise_i16x8_u", "makeUnary(s, UnaryOp::ExtAddPairwiseUVecI16x8ToI32x4)"),
     ("f64x2.convert_low_i32x4_s",     "makeUnary(s, UnaryOp::ConvertLowSVecI32x4ToVecF64x2)"),
     ("f64x2.convert_low_i32x4_u",     "makeUnary(s, UnaryOp::ConvertLowUVecI32x4ToVecF64x2)"),
-    ("i32x4.trunc_sat_f64x2_zero_s",  "makeUnary(s, UnaryOp::TruncSatZeroSVecF64x2ToVecI32x4)"),
-    ("i32x4.trunc_sat_f64x2_zero_u",  "makeUnary(s, UnaryOp::TruncSatZeroUVecF64x2ToVecI32x4)"),
+    ("i32x4.trunc_sat_f64x2_s_zero",  "makeUnary(s, UnaryOp::TruncSatZeroSVecF64x2ToVecI32x4)"),
+    ("i32x4.trunc_sat_f64x2_u_zero",  "makeUnary(s, UnaryOp::TruncSatZeroUVecF64x2ToVecI32x4)"),
     ("f32x4.demote_f64x2_zero",       "makeUnary(s, UnaryOp::DemoteZeroVecF64x2ToVecF32x4)"),
     ("f64x2.promote_low_f32x4",       "makeUnary(s, UnaryOp::PromoteLowVecF32x4ToVecF64x2)"),
-    ("i32x4.widen_i8x16_s",           "makeSIMDWiden(s, SIMDWidenOp::WidenSVecI8x16ToVecI32x4)"),
-    ("i32x4.widen_i8x16_u",           "makeSIMDWiden(s, SIMDWidenOp::WidenUVecI8x16ToVecI32x4)"),
 
-    # prefetch instructions
-    ("prefetch.t",  "makePrefetch(s, PrefetchOp::PrefetchTemporal)"),
-    ("prefetch.nt", "makePrefetch(s, PrefetchOp::PrefetchNontemporal)"),
     # reference types instructions
     # TODO Add table instructions
     ("ref.null",             "makeRefNull(s)"),