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| author | Thomas Lively <7121787+tlively@users.noreply.github.com> | 2020-05-19 10:17:07 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-05-19 10:17:07 -0700 |
| commit | fc7346918f8d15ce45639472f00fea5fa8102ff0 (patch) | |
| tree | 9d6a3e179c69aedbcef4681db2454fe86c65cc3c /scripts/gen-s-parser.py | |
| parent | 417ccb54ccbb0776148f51cb2869c122826db6d9 (diff) | |
| download | binaryen-fc7346918f8d15ce45639472f00fea5fa8102ff0.tar.gz binaryen-fc7346918f8d15ce45639472f00fea5fa8102ff0.tar.bz2 binaryen-fc7346918f8d15ce45639472f00fea5fa8102ff0.zip | |
Implement i64x2.mul (#2860)
This is the only instruction in the current spec proposal that had not
yet been implemnented in the tools.
Diffstat (limited to 'scripts/gen-s-parser.py')
| -rwxr-xr-x | scripts/gen-s-parser.py | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/scripts/gen-s-parser.py b/scripts/gen-s-parser.py index fe6513de2..b657ea909 100755 --- a/scripts/gen-s-parser.py +++ b/scripts/gen-s-parser.py @@ -424,6 +424,7 @@ instructions = [ ("i64x2.shr_u", "makeSIMDShift(s, SIMDShiftOp::ShrUVecI64x2)"), ("i64x2.add", "makeBinary(s, BinaryOp::AddVecI64x2)"), ("i64x2.sub", "makeBinary(s, BinaryOp::SubVecI64x2)"), + ("i64x2.mul", "makeBinary(s, BinaryOp::MulVecI64x2)"), ("f32x4.abs", "makeUnary(s, UnaryOp::AbsVecF32x4)"), ("f32x4.neg", "makeUnary(s, UnaryOp::NegVecF32x4)"), ("f32x4.sqrt", "makeUnary(s, UnaryOp::SqrtVecF32x4)"), |