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| author | Thomas Lively <7121787+tlively@users.noreply.github.com> | 2022-04-11 15:44:01 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-04-11 22:44:01 +0000 |
| commit | ce0333d91b70f97aa8da002f7348df68a7b56578 (patch) | |
| tree | ca06495dadf712b18bd775ad050e1e3f459b5574 /scripts | |
| parent | 5f88dcdf0d308de12579d26d30f981b0689446af (diff) | |
| download | binaryen-ce0333d91b70f97aa8da002f7348df68a7b56578.tar.gz binaryen-ce0333d91b70f97aa8da002f7348df68a7b56578.tar.bz2 binaryen-ce0333d91b70f97aa8da002f7348df68a7b56578.zip | |
Implement relaxed SIMD dot product instructions (#4586)
As proposed in https://github.com/WebAssembly/relaxed-simd/issues/52.
Diffstat (limited to 'scripts')
| -rwxr-xr-x | scripts/gen-s-parser.py | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/scripts/gen-s-parser.py b/scripts/gen-s-parser.py index 26a96fdd6..29ce83820 100755 --- a/scripts/gen-s-parser.py +++ b/scripts/gen-s-parser.py @@ -533,7 +533,11 @@ instructions = [ ("f32x4.relaxed_max", "makeBinary(s, BinaryOp::RelaxedMaxVecF32x4)"), ("f64x2.relaxed_min", "makeBinary(s, BinaryOp::RelaxedMinVecF64x2)"), ("f64x2.relaxed_max", "makeBinary(s, BinaryOp::RelaxedMaxVecF64x2)"), - ("i16x8.relaxed_q15mulr_s", "makeBinary(s, BinaryOp::RelaxedQ15MulrSVecI16x8)"), + ("i16x8.relaxed_q15mulr_s", "makeBinary(s, BinaryOp::RelaxedQ15MulrSVecI16x8)"), + ("i16x8.dot_i8x16_i7x16_s", "makeBinary(s, BinaryOp::DotI8x16I7x16SToVecI16x8)"), + ("i16x8.dot_i8x16_i7x16_u", "makeBinary(s, BinaryOp::DotI8x16I7x16UToVecI16x8)"), + ("i32x4.dot_i8x16_i7x16_add_s", "makeSIMDTernary(s, SIMDTernaryOp::DotI8x16I7x16AddSToVecI32x4)"), + ("i32x4.dot_i8x16_i7x16_add_u", "makeSIMDTernary(s, SIMDTernaryOp::DotI8x16I7x16AddUToVecI32x4)"), # reference types instructions ("ref.null", "makeRefNull(s)"), |