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| author | Daniel Wirtz <dcode@dcode.io> | 2021-04-12 22:22:16 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2021-04-12 22:22:16 +0200 |
| commit | 0d7dac2923f9164ca7f1450b6f394ef8fa9d8a68 (patch) | |
| tree | b5ecd1defc11d31c77ea9ab9236282c5a85f9f0a /src/js/binaryen.js-post.js | |
| parent | 2e4c96fab93de97665648d4ae83164e177431ad8 (diff) | |
| download | binaryen-0d7dac2923f9164ca7f1450b6f394ef8fa9d8a68.tar.gz binaryen-0d7dac2923f9164ca7f1450b6f394ef8fa9d8a68.tar.bz2 binaryen-0d7dac2923f9164ca7f1450b6f394ef8fa9d8a68.zip | |
Rename SIMD extending load instructions (#3798)
Renames the SIMD instructions
* LoadExtSVec8x8ToVecI16x8 -> Load8x8SVec128
* LoadExtUVec8x8ToVecI16x8 -> Load8x8UVec128
* LoadExtSVec16x4ToVecI32x4 -> Load16x4SVec128
* LoadExtUVec16x4ToVecI32x4 -> Load16x4UVec128
* LoadExtSVec32x2ToVecI64x2 -> Load32x2SVec128
* LoadExtUVec32x2ToVecI64x2 -> Load32x2UVec128
Diffstat (limited to 'src/js/binaryen.js-post.js')
| -rw-r--r-- | src/js/binaryen.js-post.js | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/src/js/binaryen.js-post.js b/src/js/binaryen.js-post.js index 584c6b7d8..96dad5e7b 100644 --- a/src/js/binaryen.js-post.js +++ b/src/js/binaryen.js-post.js @@ -484,12 +484,12 @@ function initializeConstants() { 'Load16SplatVec128', 'Load32SplatVec128', 'Load64SplatVec128', - 'LoadExtSVec8x8ToVecI16x8', - 'LoadExtUVec8x8ToVecI16x8', - 'LoadExtSVec16x4ToVecI32x4', - 'LoadExtUVec16x4ToVecI32x4', - 'LoadExtSVec32x2ToVecI64x2', - 'LoadExtUVec32x2ToVecI64x2', + 'Load8x8SVec128', + 'Load8x8UVec128', + 'Load16x4SVec128', + 'Load16x4UVec128', + 'Load32x2SVec128', + 'Load32x2UVec128', 'Load32ZeroVec128', 'Load64ZeroVec128', 'Load8LaneVec128', @@ -1483,22 +1483,22 @@ function wrapModule(module, self = {}) { return Module['_BinaryenSIMDLoad'](module, Module['Load64SplatVec128'], offset, align, ptr); }, 'load8x8_s'(offset, align, ptr) { - return Module['_BinaryenSIMDLoad'](module, Module['LoadExtSVec8x8ToVecI16x8'], offset, align, ptr); + return Module['_BinaryenSIMDLoad'](module, Module['Load8x8SVec128'], offset, align, ptr); }, 'load8x8_u'(offset, align, ptr) { - return Module['_BinaryenSIMDLoad'](module, Module['LoadExtUVec8x8ToVecI16x8'], offset, align, ptr); + return Module['_BinaryenSIMDLoad'](module, Module['Load8x8UVec128'], offset, align, ptr); }, 'load16x4_s'(offset, align, ptr) { - return Module['_BinaryenSIMDLoad'](module, Module['LoadExtSVec16x4ToVecI32x4'], offset, align, ptr); + return Module['_BinaryenSIMDLoad'](module, Module['Load16x4SVec128'], offset, align, ptr); }, 'load16x4_u'(offset, align, ptr) { - return Module['_BinaryenSIMDLoad'](module, Module['LoadExtUVec16x4ToVecI32x4'], offset, align, ptr); + return Module['_BinaryenSIMDLoad'](module, Module['Load16x4UVec128'], offset, align, ptr); }, 'load32x2_s'(offset, align, ptr) { - return Module['_BinaryenSIMDLoad'](module, Module['LoadExtSVec32x2ToVecI64x2'], offset, align, ptr); + return Module['_BinaryenSIMDLoad'](module, Module['Load32x2SVec128'], offset, align, ptr); }, 'load32x2_u'(offset, align, ptr) { - return Module['_BinaryenSIMDLoad'](module, Module['LoadExtUVec32x2ToVecI64x2'], offset, align, ptr); + return Module['_BinaryenSIMDLoad'](module, Module['Load32x2UVec128'], offset, align, ptr); }, 'load32_zero'(offset, align, ptr) { return Module['_BinaryenSIMDLoad'](module, Module['Load32ZeroVec128'], offset, align, ptr); |