Update SIMD names and opcodes (#3771)

Also removes experimental SIMD instructions that were not included in the final
spec proposal.

1 files changed, 70 insertions, 125 deletions

diff --git a/src/passes/Print.cpp b/src/passes/Print.cpp
index e3ea04b53..5f8c9f163 100644
--- a/src/passes/Print.cpp
+++ b/src/passes/Print.cpp
@@ -639,7 +639,7 @@ struct PrintExpressionContents
   }
   void visitSIMDShuffle(SIMDShuffle* curr) {
     prepareColor(o);
-    o << "v8x16.shuffle";
+    o << "i8x16.shuffle";
     restoreNormalColor(o);
     for (uint8_t mask_index : curr->mask) {
       o << " " << std::to_string(mask_index);
@@ -651,30 +651,6 @@ struct PrintExpressionContents
       case Bitselect:
         o << "v128.bitselect";
         break;
-      case QFMAF32x4:
-        o << "f32x4.qfma";
-        break;
-      case QFMSF32x4:
-        o << "f32x4.qfms";
-        break;
-      case QFMAF64x2:
-        o << "f64x2.qfma";
-        break;
-      case QFMSF64x2:
-        o << "f64x2.qfms";
-        break;
-      case SignSelectVec8x16:
-        o << "v8x16.signselect";
-        break;
-      case SignSelectVec16x8:
-        o << "v16x8.signselect";
-        break;
-      case SignSelectVec32x4:
-        o << "v32x4.signselect";
-        break;
-      case SignSelectVec64x2:
-        o << "v64x2.signselect";
-        break;
     }
     restoreNormalColor(o);
   }
@@ -724,34 +700,34 @@ struct PrintExpressionContents
     prepareColor(o);
     switch (curr->op) {
       case LoadSplatVec8x16:
-        o << "v8x16.load_splat";
+        o << "v128.load8_splat";
         break;
       case LoadSplatVec16x8:
-        o << "v16x8.load_splat";
+        o << "v128.load16_splat";
         break;
       case LoadSplatVec32x4:
-        o << "v32x4.load_splat";
+        o << "v128.load32_splat";
         break;
       case LoadSplatVec64x2:
-        o << "v64x2.load_splat";
+        o << "v128.load64_splat";
         break;
       case LoadExtSVec8x8ToVecI16x8:
-        o << "i16x8.load8x8_s";
+        o << "v128.load8x8_s";
         break;
       case LoadExtUVec8x8ToVecI16x8:
-        o << "i16x8.load8x8_u";
+        o << "v128.load8x8_u";
         break;
       case LoadExtSVec16x4ToVecI32x4:
-        o << "i32x4.load16x4_s";
+        o << "v128.load16x4_s";
         break;
       case LoadExtUVec16x4ToVecI32x4:
-        o << "i32x4.load16x4_u";
+        o << "v128.load16x4_u";
         break;
       case LoadExtSVec32x2ToVecI64x2:
-        o << "i64x2.load32x2_s";
+        o << "v128.load32x2_s";
         break;
       case LoadExtUVec32x2ToVecI64x2:
-        o << "i64x2.load32x2_u";
+        o << "v128.load32x2_u";
         break;
       case Load32Zero:
         o << "v128.load32_zero";
@@ -805,37 +781,6 @@ struct PrintExpressionContents
     }
     o << " " << int(curr->index);
   }
-  void visitSIMDWiden(SIMDWiden* curr) {
-    prepareColor(o);
-    switch (curr->op) {
-      case WidenSVecI8x16ToVecI32x4:
-        o << "i32x4.widen_i8x16_s ";
-        break;
-      case WidenUVecI8x16ToVecI32x4:
-        o << "i32x4.widen_i8x16_u ";
-        break;
-    }
-    restoreNormalColor(o);
-    o << int(curr->index);
-  }
-  void visitPrefetch(Prefetch* curr) {
-    prepareColor(o);
-    switch (curr->op) {
-      case PrefetchTemporal:
-        o << "prefetch.t";
-        break;
-      case PrefetchNontemporal:
-        o << "prefetch.nt";
-        break;
-    }
-    restoreNormalColor(o);
-    if (curr->offset) {
-      o << " offset=" << curr->offset;
-    }
-    if (curr->align != 1) {
-      o << " align=" << curr->align;
-    }
-  }
   void visitMemoryInit(MemoryInit* curr) {
     prepareColor(o);
     o << "memory.init";
@@ -1065,15 +1010,15 @@ struct PrintExpressionContents
       case NotVec128:
         o << "v128.not";
         break;
+      case AnyTrueVec128:
+        o << "v128.any_true";
+        break;
       case AbsVecI8x16:
         o << "i8x16.abs";
         break;
       case NegVecI8x16:
         o << "i8x16.neg";
         break;
-      case AnyTrueVecI8x16:
-        o << "i8x16.any_true";
-        break;
       case AllTrueVecI8x16:
         o << "i8x16.all_true";
         break;
@@ -1089,9 +1034,6 @@ struct PrintExpressionContents
       case NegVecI16x8:
         o << "i16x8.neg";
         break;
-      case AnyTrueVecI16x8:
-        o << "i16x8.any_true";
-        break;
       case AllTrueVecI16x8:
         o << "i16x8.all_true";
         break;
@@ -1104,18 +1046,21 @@ struct PrintExpressionContents
       case NegVecI32x4:
         o << "i32x4.neg";
         break;
-      case AnyTrueVecI32x4:
-        o << "i32x4.any_true";
-        break;
       case AllTrueVecI32x4:
         o << "i32x4.all_true";
         break;
       case BitmaskVecI32x4:
         o << "i32x4.bitmask";
         break;
+      case AbsVecI64x2:
+        o << "i64x2.abs";
+        break;
       case NegVecI64x2:
         o << "i64x2.neg";
         break;
+      case AllTrueVecI64x2:
+        o << "i64x2.all_true";
+        break;
       case BitmaskVecI64x2:
         o << "i64x2.bitmask";
         break;
@@ -1179,59 +1124,47 @@ struct PrintExpressionContents
       case TruncSatUVecF32x4ToVecI32x4:
         o << "i32x4.trunc_sat_f32x4_u";
         break;
-      case TruncSatSVecF64x2ToVecI64x2:
-        o << "i64x2.trunc_sat_f64x2_s";
-        break;
-      case TruncSatUVecF64x2ToVecI64x2:
-        o << "i64x2.trunc_sat_f64x2_u";
-        break;
       case ConvertSVecI32x4ToVecF32x4:
         o << "f32x4.convert_i32x4_s";
         break;
       case ConvertUVecI32x4ToVecF32x4:
         o << "f32x4.convert_i32x4_u";
         break;
-      case ConvertSVecI64x2ToVecF64x2:
-        o << "f64x2.convert_i64x2_s";
-        break;
-      case ConvertUVecI64x2ToVecF64x2:
-        o << "f64x2.convert_i64x2_u";
+      case ExtendLowSVecI8x16ToVecI16x8:
+        o << "i16x8.extend_low_i8x16_s";
         break;
-      case WidenLowSVecI8x16ToVecI16x8:
-        o << "i16x8.widen_low_i8x16_s";
+      case ExtendHighSVecI8x16ToVecI16x8:
+        o << "i16x8.extend_high_i8x16_s";
         break;
-      case WidenHighSVecI8x16ToVecI16x8:
-        o << "i16x8.widen_high_i8x16_s";
+      case ExtendLowUVecI8x16ToVecI16x8:
+        o << "i16x8.extend_low_i8x16_u";
         break;
-      case WidenLowUVecI8x16ToVecI16x8:
-        o << "i16x8.widen_low_i8x16_u";
+      case ExtendHighUVecI8x16ToVecI16x8:
+        o << "i16x8.extend_high_i8x16_u";
         break;
-      case WidenHighUVecI8x16ToVecI16x8:
-        o << "i16x8.widen_high_i8x16_u";
+      case ExtendLowSVecI16x8ToVecI32x4:
+        o << "i32x4.extend_low_i16x8_s";
         break;
-      case WidenLowSVecI16x8ToVecI32x4:
-        o << "i32x4.widen_low_i16x8_s";
+      case ExtendHighSVecI16x8ToVecI32x4:
+        o << "i32x4.extend_high_i16x8_s";
         break;
-      case WidenHighSVecI16x8ToVecI32x4:
-        o << "i32x4.widen_high_i16x8_s";
+      case ExtendLowUVecI16x8ToVecI32x4:
+        o << "i32x4.extend_low_i16x8_u";
         break;
-      case WidenLowUVecI16x8ToVecI32x4:
-        o << "i32x4.widen_low_i16x8_u";
+      case ExtendHighUVecI16x8ToVecI32x4:
+        o << "i32x4.extend_high_i16x8_u";
         break;
-      case WidenHighUVecI16x8ToVecI32x4:
-        o << "i32x4.widen_high_i16x8_u";
+      case ExtendLowSVecI32x4ToVecI64x2:
+        o << "i64x2.extend_low_i32x4_s";
         break;
-      case WidenLowSVecI32x4ToVecI64x2:
-        o << "i64x2.widen_low_i32x4_s";
+      case ExtendHighSVecI32x4ToVecI64x2:
+        o << "i64x2.extend_high_i32x4_s";
         break;
-      case WidenHighSVecI32x4ToVecI64x2:
-        o << "i64x2.widen_high_i32x4_s";
+      case ExtendLowUVecI32x4ToVecI64x2:
+        o << "i64x2.extend_low_i32x4_u";
         break;
-      case WidenLowUVecI32x4ToVecI64x2:
-        o << "i64x2.widen_low_i32x4_u";
-        break;
-      case WidenHighUVecI32x4ToVecI64x2:
-        o << "i64x2.widen_high_i32x4_u";
+      case ExtendHighUVecI32x4ToVecI64x2:
+        o << "i64x2.extend_high_i32x4_u";
         break;
       case ConvertLowSVecI32x4ToVecF64x2:
         o << "f64x2.convert_low_i32x4_s";
@@ -1240,10 +1173,10 @@ struct PrintExpressionContents
         o << "f64x2.convert_low_i32x4_u";
         break;
       case TruncSatZeroSVecF64x2ToVecI32x4:
-        o << "i32x4.trunc_sat_f64x2_zero_s";
+        o << "i32x4.trunc_sat_f64x2_s_zero";
         break;
       case TruncSatZeroUVecF64x2ToVecI32x4:
-        o << "i32x4.trunc_sat_f64x2_zero_u";
+        o << "i32x4.trunc_sat_f64x2_u_zero";
         break;
       case DemoteZeroVecF64x2ToVecF32x4:
         o << "f32x4.demote_f64x2_zero";
@@ -1584,6 +1517,21 @@ struct PrintExpressionContents
       case EqVecI64x2:
         o << "i64x2.eq";
         break;
+      case NeVecI64x2:
+        o << "i64x2.ne";
+        break;
+      case LtSVecI64x2:
+        o << "i64x2.lt_s";
+        break;
+      case GtSVecI64x2:
+        o << "i64x2.gt_s";
+        break;
+      case LeSVecI64x2:
+        o << "i64x2.le_s";
+        break;
+      case GeSVecI64x2:
+        o << "i64x2.ge_s";
+        break;
       case EqVecF32x4:
         o << "f32x4.eq";
         break;
@@ -1638,22 +1586,19 @@ struct PrintExpressionContents
         o << "i8x16.add";
         break;
       case AddSatSVecI8x16:
-        o << "i8x16.add_saturate_s";
+        o << "i8x16.add_sat_s";
         break;
       case AddSatUVecI8x16:
-        o << "i8x16.add_saturate_u";
+        o << "i8x16.add_sat_u";
         break;
       case SubVecI8x16:
         o << "i8x16.sub";
         break;
       case SubSatSVecI8x16:
-        o << "i8x16.sub_saturate_s";
+        o << "i8x16.sub_sat_s";
         break;
       case SubSatUVecI8x16:
-        o << "i8x16.sub_saturate_u";
-        break;
-      case MulVecI8x16:
-        o << "i8x16.mul";
+        o << "i8x16.sub_sat_u";
         break;
       case MinSVecI8x16:
         o << "i8x16.min_s";
@@ -1674,19 +1619,19 @@ struct PrintExpressionContents
         o << "i16x8.add";
         break;
       case AddSatSVecI16x8:
-        o << "i16x8.add_saturate_s";
+        o << "i16x8.add_sat_s";
         break;
       case AddSatUVecI16x8:
-        o << "i16x8.add_saturate_u";
+        o << "i16x8.add_sat_u";
         break;
       case SubVecI16x8:
         o << "i16x8.sub";
         break;
       case SubSatSVecI16x8:
-        o << "i16x8.sub_saturate_s";
+        o << "i16x8.sub_sat_s";
         break;
       case SubSatUVecI16x8:
-        o << "i16x8.sub_saturate_u";
+        o << "i16x8.sub_sat_u";
         break;
       case MulVecI16x8:
         o << "i16x8.mul";
@@ -1844,7 +1789,7 @@ struct PrintExpressionContents
         break;
 
       case SwizzleVec8x16:
-        o << "v8x16.swizzle";
+        o << "i8x16.swizzle";
         break;
 
       case InvalidBinary: