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| author | Thomas Lively <7121787+tlively@users.noreply.github.com> | 2020-10-28 09:05:03 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-10-28 09:05:03 -0700 |
| commit | 5f7d2636e926e0061e4f07dfd5c864d32a7f6144 (patch) | |
| tree | d4b718103203ea8056f645e19b04d1dd939552e2 /src/passes/Print.cpp | |
| parent | 8fd93ee74150a8783c5118ea9804b508fe67701f (diff) | |
| download | binaryen-5f7d2636e926e0061e4f07dfd5c864d32a7f6144.tar.gz binaryen-5f7d2636e926e0061e4f07dfd5c864d32a7f6144.tar.bz2 binaryen-5f7d2636e926e0061e4f07dfd5c864d32a7f6144.zip | |
Prototype new SIMD multiplications (#3291)
Including saturating, rounding Q15 multiplication as proposed in
https://github.com/WebAssembly/simd/pull/365 and extending multiplications as
proposed in https://github.com/WebAssembly/simd/pull/376. Since these are just
prototypes, skips adding them to the C or JS APIs and the fuzzer, as well as
implementing them in the interpreter.
Diffstat (limited to 'src/passes/Print.cpp')
| -rw-r--r-- | src/passes/Print.cpp | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/src/passes/Print.cpp b/src/passes/Print.cpp index c093158f3..e653e85bd 100644 --- a/src/passes/Print.cpp +++ b/src/passes/Print.cpp @@ -1357,6 +1357,22 @@ struct PrintExpressionContents case AvgrUVecI16x8: o << "i16x8.avgr_u"; break; + case Q15MulrSatSVecI16x8: + o << "i16x8.q15mulr_sat_s"; + break; + case ExtMulLowSVecI16x8: + o << "i16x8.extmul_low_i8x16_s"; + break; + case ExtMulHighSVecI16x8: + o << "i16x8.extmul_high_i8x16_s"; + break; + case ExtMulLowUVecI16x8: + o << "i16x8.extmul_low_i8x16_u"; + break; + case ExtMulHighUVecI16x8: + o << "i16x8.extmul_high_i8x16_u"; + break; + case AddVecI32x4: o << "i32x4.add"; break; @@ -1381,6 +1397,19 @@ struct PrintExpressionContents case DotSVecI16x8ToVecI32x4: o << "i32x4.dot_i16x8_s"; break; + case ExtMulLowSVecI32x4: + o << "i32x4.extmul_low_i16x8_s"; + break; + case ExtMulHighSVecI32x4: + o << "i32x4.extmul_high_i16x8_s"; + break; + case ExtMulLowUVecI32x4: + o << "i32x4.extmul_low_i16x8_u"; + break; + case ExtMulHighUVecI32x4: + o << "i32x4.extmul_high_i16x8_u"; + break; + case AddVecI64x2: o << "i64x2.add"; break; @@ -1390,6 +1419,18 @@ struct PrintExpressionContents case MulVecI64x2: o << "i64x2.mul"; break; + case ExtMulLowSVecI64x2: + o << "i64x2.extmul_low_i32x4_s"; + break; + case ExtMulHighSVecI64x2: + o << "i64x2.extmul_high_i32x4_s"; + break; + case ExtMulLowUVecI64x2: + o << "i64x2.extmul_low_i32x4_u"; + break; + case ExtMulHighUVecI64x2: + o << "i64x2.extmul_high_i32x4_u"; + break; case AddVecF32x4: o << "f32x4.add"; |