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author | Thomas Lively <7121787+tlively@users.noreply.github.com> | 2020-01-08 17:43:25 -0800 |
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committer | GitHub <noreply@github.com> | 2020-01-08 17:43:25 -0800 |
commit | 77329439d6307d292e59986db3a194c3085abbe2 (patch) | |
tree | ac9f4ad3787f2e0d3644d34ff324a546380a17fd /src/tools/fuzzing.h | |
parent | 8d4db9fb86c3b80df3eaa0d8e5eb379d081c8399 (diff) | |
download | binaryen-77329439d6307d292e59986db3a194c3085abbe2.tar.gz binaryen-77329439d6307d292e59986db3a194c3085abbe2.tar.bz2 binaryen-77329439d6307d292e59986db3a194c3085abbe2.zip |
Remove implicit conversion operators from Type (#2577)
* Remove implicit conversion operators from Type
Now types must be explicitly converted to uint32_t with Type::getID or
to ValueType with Type::getVT. This fixes #2572 for switches that use
Type::getVT.
* getVT => getSingle
Diffstat (limited to 'src/tools/fuzzing.h')
-rw-r--r-- | src/tools/fuzzing.h | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/src/tools/fuzzing.h b/src/tools/fuzzing.h index 81bd87581..e21c6a14d 100644 --- a/src/tools/fuzzing.h +++ b/src/tools/fuzzing.h @@ -312,7 +312,7 @@ private: SmallVector<Type, 2> getSubTypes(Type type) { SmallVector<Type, 2> ret; ret.push_back(type); // includes itself - switch (type) { + switch (type.getSingle()) { case Type::anyref: ret.push_back(Type::funcref); ret.push_back(Type::exnref); @@ -860,7 +860,7 @@ private: } nesting++; Expression* ret = nullptr; - switch (type) { + switch (type.getSingle()) { case Type::i32: case Type::i64: case Type::f32: @@ -1348,7 +1348,7 @@ private: Expression* makeNonAtomicLoad(Type type) { auto offset = logify(get()); auto ptr = makePointer(); - switch (type) { + switch (type.getSingle()) { case Type::i32: { bool signed_ = get() & 1; switch (upTo(3)) { @@ -1454,7 +1454,7 @@ private: auto offset = logify(get()); auto ptr = makePointer(); auto value = make(type); - switch (type) { + switch (type.getSingle()) { case Type::i32: { switch (upTo(3)) { case 0: @@ -1582,7 +1582,7 @@ private: switch (upTo(4)) { case 0: { // totally random, entire range - switch (type) { + switch (type.getSingle()) { case Type::i32: return Literal(get32()); case Type::i64: @@ -1627,7 +1627,7 @@ private: default: WASM_UNREACHABLE("invalid value"); } - switch (type) { + switch (type.getSingle()) { case Type::i32: return Literal(int32_t(small)); case Type::i64: @@ -1650,7 +1650,7 @@ private: case 2: { // special values Literal value; - switch (type) { + switch (type.getSingle()) { case Type::i32: value = Literal(pick<int32_t>(0, @@ -1725,7 +1725,7 @@ private: case 3: { // powers of 2 Literal value; - switch (type) { + switch (type.getSingle()) { case Type::i32: value = Literal(int32_t(1) << upTo(32)); break; @@ -1807,9 +1807,9 @@ private: return makeTrivial(type); } - switch (type) { + switch (type.getSingle()) { case Type::i32: { - switch (getConcreteType()) { + switch (getConcreteType().getSingle()) { case Type::i32: { auto op = pick( FeatureOptions<UnaryOp>() @@ -2026,7 +2026,7 @@ private: return makeTrivial(type); } - switch (type) { + switch (type.getSingle()) { case Type::i32: { switch (upTo(4)) { case 0: @@ -2331,7 +2331,7 @@ private: } } Index bytes; - switch (type) { + switch (type.getSingle()) { case Type::i32: { switch (upTo(3)) { case 0: @@ -2422,7 +2422,7 @@ private: Expression* makeSIMDExtract(Type type) { auto op = static_cast<SIMDExtractOp>(0); - switch (type) { + switch (type.getSingle()) { case Type::i32: op = pick(ExtractLaneSVecI8x16, ExtractLaneUVecI8x16, |