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| author | Thomas Lively <7121787+tlively@users.noreply.github.com> | 2019-09-24 15:29:15 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-09-24 15:29:15 -0700 |
| commit | 034ed383a968204427befda3f9fb8bb5d2f63f75 (patch) | |
| tree | 36ae37db02cdae27416be250fe533d0f0bff77e8 /src/wasm.h | |
| parent | 835581f58eb5040656243f7345ebcacf6d7deee5 (diff) | |
| download | binaryen-034ed383a968204427befda3f9fb8bb5d2f63f75.tar.gz binaryen-034ed383a968204427befda3f9fb8bb5d2f63f75.tar.bz2 binaryen-034ed383a968204427befda3f9fb8bb5d2f63f75.zip | |
v128.andnot instruction (#2355)
As specified at https://github.com/WebAssembly/simd/pull/102.
Also fixes bugs in the JS API for other SIMD bitwise operators.
Diffstat (limited to 'src/wasm.h')
| -rw-r--r-- | src/wasm.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/wasm.h b/src/wasm.h index 735b24163..7aa3ecea3 100644 --- a/src/wasm.h +++ b/src/wasm.h @@ -353,6 +353,7 @@ enum BinaryOp { AndVec128, OrVec128, XorVec128, + AndNotVec128, AddVecI8x16, AddSatSVecI8x16, AddSatUVecI8x16, |