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authorThomas Lively <7121787+tlively@users.noreply.github.com>2020-08-03 13:48:10 -0700
committerGitHub <noreply@github.com>2020-08-03 13:48:10 -0700
commitdaa442b40f92ee5117c9c7c391171c3304abc67e (patch)
treed4533e9f8d3564e20bc6b1c006e74f4b32d3dcca /src/wasm/wasm-s-parser.cpp
parent79f2fe4eb4197b3f2a1f8ad0c3a34bf9c28149a1 (diff)
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Implement prototype v128.load{32,64}_zero instructions (#3011)
Specified in https://github.com/WebAssembly/simd/pull/237. Since these are just prototypes necessary for benchmarking, this PR does not add support for these instructions to the fuzzer or the C or JS APIs. This PR also renumbers the QFMA instructions that previously used the opcodes for these new instructions. The renumbering matches the renumbering in V8 and LLVM.
Diffstat (limited to 'src/wasm/wasm-s-parser.cpp')
-rw-r--r--src/wasm/wasm-s-parser.cpp2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/wasm/wasm-s-parser.cpp b/src/wasm/wasm-s-parser.cpp
index 429cac273..5e6008bca 100644
--- a/src/wasm/wasm-s-parser.cpp
+++ b/src/wasm/wasm-s-parser.cpp
@@ -1528,6 +1528,7 @@ Expression* SExpressionWasmBuilder::makeSIMDLoad(Element& s, SIMDLoadOp op) {
defaultAlign = 2;
break;
case LoadSplatVec32x4:
+ case Load32Zero:
defaultAlign = 4;
break;
case LoadSplatVec64x2:
@@ -1537,6 +1538,7 @@ Expression* SExpressionWasmBuilder::makeSIMDLoad(Element& s, SIMDLoadOp op) {
case LoadExtUVec16x4ToVecI32x4:
case LoadExtSVec32x2ToVecI64x2:
case LoadExtUVec32x2ToVecI64x2:
+ case Load64Zero:
defaultAlign = 8;
break;
}