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| author | Thomas Lively <7121787+tlively@users.noreply.github.com> | 2020-03-20 16:31:16 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-03-20 16:31:16 -0700 |
| commit | 03ae7fcbfc5cedefd25c2414616cb1d3f77ab51b (patch) | |
| tree | 17f6a9148ffd659f870dfe5745383fb1507e4d42 /src/wasm/wasm-validator.cpp | |
| parent | 39fda77da51f83b200fc63bbfbc4dd2ccbfc2388 (diff) | |
| download | binaryen-03ae7fcbfc5cedefd25c2414616cb1d3f77ab51b.tar.gz binaryen-03ae7fcbfc5cedefd25c2414616cb1d3f77ab51b.tar.bz2 binaryen-03ae7fcbfc5cedefd25c2414616cb1d3f77ab51b.zip | |
SIMD integer abs and bitmask instructions (#2703)
Adds full support for the {i8x16,i16x8,i32x4}.abs instructions merged
to the SIMD proposal in https://github.com/WebAssembly/simd/pull/128
as well as the {i8x16,i16x8,i32x4}.bitmask instructions proposed in
https://github.com/WebAssembly/simd/pull/201.
Diffstat (limited to 'src/wasm/wasm-validator.cpp')
| -rw-r--r-- | src/wasm/wasm-validator.cpp | 17 |
1 files changed, 10 insertions, 7 deletions
diff --git a/src/wasm/wasm-validator.cpp b/src/wasm/wasm-validator.cpp index 1db8ed7c0..984c25b3f 100644 --- a/src/wasm/wasm-validator.cpp +++ b/src/wasm/wasm-validator.cpp @@ -1689,6 +1689,9 @@ void FunctionValidator::visitUnary(Unary* curr) { curr->value->type, Type(Type::f64), curr, "expected f64 splat value"); break; case NotVec128: + case AbsVecI8x16: + case AbsVecI16x8: + case AbsVecI32x4: case NegVecI8x16: case NegVecI16x8: case NegVecI32x4: @@ -1720,17 +1723,17 @@ void FunctionValidator::visitUnary(Unary* curr) { curr->value->type, Type(Type::v128), curr, "expected v128 operand"); break; case AnyTrueVecI8x16: - case AllTrueVecI8x16: case AnyTrueVecI16x8: - case AllTrueVecI16x8: case AnyTrueVecI32x4: - case AllTrueVecI32x4: case AnyTrueVecI64x2: + case AllTrueVecI8x16: + case AllTrueVecI16x8: + case AllTrueVecI32x4: case AllTrueVecI64x2: - shouldBeEqual(curr->type, - Type(Type::i32), - curr, - "expected boolean reduction to have i32 type"); + case BitmaskVecI8x16: + case BitmaskVecI16x8: + case BitmaskVecI32x4: + shouldBeEqual(curr->type, Type(Type::i32), curr, "expected i32 type"); shouldBeEqual( curr->value->type, Type(Type::v128), curr, "expected v128 operand"); break; |