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| author | Thomas Lively <7121787+tlively@users.noreply.github.com> | 2020-10-28 09:05:03 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-10-28 09:05:03 -0700 |
| commit | 5f7d2636e926e0061e4f07dfd5c864d32a7f6144 (patch) | |
| tree | d4b718103203ea8056f645e19b04d1dd939552e2 /src/wasm/wasm-validator.cpp | |
| parent | 8fd93ee74150a8783c5118ea9804b508fe67701f (diff) | |
| download | binaryen-5f7d2636e926e0061e4f07dfd5c864d32a7f6144.tar.gz binaryen-5f7d2636e926e0061e4f07dfd5c864d32a7f6144.tar.bz2 binaryen-5f7d2636e926e0061e4f07dfd5c864d32a7f6144.zip | |
Prototype new SIMD multiplications (#3291)
Including saturating, rounding Q15 multiplication as proposed in
https://github.com/WebAssembly/simd/pull/365 and extending multiplications as
proposed in https://github.com/WebAssembly/simd/pull/376. Since these are just
prototypes, skips adding them to the C or JS APIs and the fuzzer, as well as
implementing them in the interpreter.
Diffstat (limited to 'src/wasm/wasm-validator.cpp')
| -rw-r--r-- | src/wasm/wasm-validator.cpp | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/src/wasm/wasm-validator.cpp b/src/wasm/wasm-validator.cpp index e09a8fb36..38dfa8092 100644 --- a/src/wasm/wasm-validator.cpp +++ b/src/wasm/wasm-validator.cpp @@ -1608,6 +1608,11 @@ void FunctionValidator::visitBinary(Binary* curr) { case MaxSVecI8x16: case MaxUVecI8x16: case AvgrUVecI8x16: + case Q15MulrSatSVecI16x8: + case ExtMulLowSVecI16x8: + case ExtMulHighSVecI16x8: + case ExtMulLowUVecI16x8: + case ExtMulHighUVecI16x8: case AddVecI16x8: case AddSatSVecI16x8: case AddSatUVecI16x8: @@ -1628,9 +1633,17 @@ void FunctionValidator::visitBinary(Binary* curr) { case MaxSVecI32x4: case MaxUVecI32x4: case DotSVecI16x8ToVecI32x4: + case ExtMulLowSVecI32x4: + case ExtMulHighSVecI32x4: + case ExtMulLowUVecI32x4: + case ExtMulHighUVecI32x4: case AddVecI64x2: case SubVecI64x2: case MulVecI64x2: + case ExtMulLowSVecI64x2: + case ExtMulHighSVecI64x2: + case ExtMulLowUVecI64x2: + case ExtMulHighUVecI64x2: case AddVecF32x4: case SubVecF32x4: case MulVecF32x4: |