summaryrefslogtreecommitdiff
path: root/src/wasm/wasm.cpp
diff options
context:
space:
mode:
authorThomas Lively <7121787+tlively@users.noreply.github.com>2019-02-05 12:35:09 -0800
committerGitHub <noreply@github.com>2019-02-05 12:35:09 -0800
commitf424f81886405fc26a415fc86900c0f8d0df14eb (patch)
tree5896c316f216fca9654f55e41809839d181ca53b /src/wasm/wasm.cpp
parent484f62f985cb2180139d1cf991ac04ee41635417 (diff)
downloadbinaryen-f424f81886405fc26a415fc86900c0f8d0df14eb.tar.gz
binaryen-f424f81886405fc26a415fc86900c0f8d0df14eb.tar.bz2
binaryen-f424f81886405fc26a415fc86900c0f8d0df14eb.zip
Bulk memory operations (#1892)
Bulk memory operations The only parts missing are the interpreter implementation and spec tests.
Diffstat (limited to 'src/wasm/wasm.cpp')
-rw-r--r--src/wasm/wasm.cpp32
1 files changed, 32 insertions, 0 deletions
diff --git a/src/wasm/wasm.cpp b/src/wasm/wasm.cpp
index 0d5f3d5b5..847df5ce6 100644
--- a/src/wasm/wasm.cpp
+++ b/src/wasm/wasm.cpp
@@ -110,6 +110,10 @@ const char* getExpressionName(Expression* curr) {
case Expression::Id::SIMDShuffleId: return "simd_shuffle";
case Expression::Id::SIMDBitselectId: return "simd_bitselect";
case Expression::Id::SIMDShiftId: return "simd_shift";
+ case Expression::Id::MemoryInitId: return "memory_init";
+ case Expression::Id::DataDropId: return "data_drop";
+ case Expression::Id::MemoryCopyId: return "memory_copy";
+ case Expression::Id::MemoryFillId: return "memory_fill";
case Expression::Id::NumExpressionIds: WASM_UNREACHABLE();
}
WASM_UNREACHABLE();
@@ -464,6 +468,34 @@ void SIMDBitselect::finalize() {
}
}
+void MemoryInit::finalize() {
+ assert(dest && offset && size);
+ type = none;
+ if (dest->type == unreachable || offset->type == unreachable || size->type == unreachable) {
+ type = unreachable;
+ }
+}
+
+void DataDrop::finalize() {
+ type = none;
+}
+
+void MemoryCopy::finalize() {
+ assert(dest && source && size);
+ type = none;
+ if (dest->type == unreachable || source->type == unreachable || size->type == unreachable) {
+ type = unreachable;
+ }
+}
+
+void MemoryFill::finalize() {
+ assert(dest && value && size);
+ type = none;
+ if (dest->type == unreachable || value->type == unreachable || size->type == unreachable) {
+ type = unreachable;
+ }
+}
+
void SIMDShift::finalize() {
assert(vec && shift);
type = v128;