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authorThomas Lively <tlively@google.com>2022-10-20 14:24:11 -0500
committerGitHub <noreply@github.com>2022-10-20 12:24:11 -0700
commit7144c922f1cd19a4c55c603c7f57f224e9ec4975 (patch)
tree8cd37df44eefbb492a528f50cfdb1afc4b5a2a5a /src
parentaeed16c568700a5340138cc4c43e5818e8a413fb (diff)
downloadbinaryen-7144c922f1cd19a4c55c603c7f57f224e9ec4975.tar.gz
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[NFC] Avoid re-parsing instruction names (#5171)
Since gen-s-parser.py is essentially a giant table mapping instruction names to the information necessary to construct the corresponding IR nodes, there should be no need to further parse instruction names after the code generated by gen-s-parser.py runs. However, memory instruction parsing still parsed instruction names to get information such as size and default alignment. The new parser does not have the ability to parse that information out of instruction names, so put it in the gen-s-parser.py table instead.
Diffstat (limited to 'src')
-rw-r--r--src/gen-s-parser.inc352
-rw-r--r--src/wasm-s-parser.h9
-rw-r--r--src/wasm/wasm-s-parser.cpp169
-rw-r--r--src/wasm/wat-parser.cpp30
4 files changed, 237 insertions, 323 deletions
diff --git a/src/gen-s-parser.inc b/src/gen-s-parser.inc
index da6c07ca0..d9a6dab22 100644
--- a/src/gen-s-parser.inc
+++ b/src/gen-s-parser.inc
@@ -309,7 +309,7 @@ switch (op[0]) {
if (op == "f32.le"sv) { return makeBinary(s, BinaryOp::LeFloat32); }
goto parse_error;
case 'o':
- if (op == "f32.load"sv) { return makeLoad(s, Type::f32, /*isAtomic=*/false); }
+ if (op == "f32.load"sv) { return makeLoad(s, Type::f32, /*signed=*/false, 4, /*isAtomic=*/false); }
goto parse_error;
case 't':
if (op == "f32.lt"sv) { return makeBinary(s, BinaryOp::LtFloat32); }
@@ -354,7 +354,7 @@ switch (op[0]) {
if (op == "f32.sqrt"sv) { return makeUnary(s, UnaryOp::SqrtFloat32); }
goto parse_error;
case 't':
- if (op == "f32.store"sv) { return makeStore(s, Type::f32, /*isAtomic=*/false); }
+ if (op == "f32.store"sv) { return makeStore(s, Type::f32, 4, /*isAtomic=*/false); }
goto parse_error;
case 'u':
if (op == "f32.sub"sv) { return makeBinary(s, BinaryOp::SubFloat32); }
@@ -636,7 +636,7 @@ switch (op[0]) {
if (op == "f64.le"sv) { return makeBinary(s, BinaryOp::LeFloat64); }
goto parse_error;
case 'o':
- if (op == "f64.load"sv) { return makeLoad(s, Type::f64, /*isAtomic=*/false); }
+ if (op == "f64.load"sv) { return makeLoad(s, Type::f64, /*signed=*/false, 8, /*isAtomic=*/false); }
goto parse_error;
case 't':
if (op == "f64.lt"sv) { return makeBinary(s, BinaryOp::LtFloat64); }
@@ -684,7 +684,7 @@ switch (op[0]) {
if (op == "f64.sqrt"sv) { return makeUnary(s, UnaryOp::SqrtFloat64); }
goto parse_error;
case 't':
- if (op == "f64.store"sv) { return makeStore(s, Type::f64, /*isAtomic=*/false); }
+ if (op == "f64.store"sv) { return makeStore(s, Type::f64, 8, /*isAtomic=*/false); }
goto parse_error;
case 'u':
if (op == "f64.sub"sv) { return makeBinary(s, BinaryOp::SubFloat64); }
@@ -1235,13 +1235,13 @@ switch (op[0]) {
case 'l': {
switch (op[15]) {
case '\0':
- if (op == "i32.atomic.load"sv) { return makeLoad(s, Type::i32, /*isAtomic=*/true); }
+ if (op == "i32.atomic.load"sv) { return makeLoad(s, Type::i32, /*signed=*/false, 4, /*isAtomic=*/true); }
goto parse_error;
case '1':
- if (op == "i32.atomic.load16_u"sv) { return makeLoad(s, Type::i32, /*isAtomic=*/true); }
+ if (op == "i32.atomic.load16_u"sv) { return makeLoad(s, Type::i32, /*signed=*/false, 2, /*isAtomic=*/true); }
goto parse_error;
case '8':
- if (op == "i32.atomic.load8_u"sv) { return makeLoad(s, Type::i32, /*isAtomic=*/true); }
+ if (op == "i32.atomic.load8_u"sv) { return makeLoad(s, Type::i32, /*signed=*/false, 1, /*isAtomic=*/true); }
goto parse_error;
default: goto parse_error;
}
@@ -1253,30 +1253,30 @@ switch (op[0]) {
case 'a': {
switch (op[16]) {
case 'd':
- if (op == "i32.atomic.rmw.add"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i32); }
+ if (op == "i32.atomic.rmw.add"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWAdd, Type::i32, 4); }
goto parse_error;
case 'n':
- if (op == "i32.atomic.rmw.and"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i32); }
+ if (op == "i32.atomic.rmw.and"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWAnd, Type::i32, 4); }
goto parse_error;
default: goto parse_error;
}
}
case 'c':
- if (op == "i32.atomic.rmw.cmpxchg"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i32); }
+ if (op == "i32.atomic.rmw.cmpxchg"sv) { return makeAtomicCmpxchg(s, Type::i32, 4); }
goto parse_error;
case 'o':
- if (op == "i32.atomic.rmw.or"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i32); }
+ if (op == "i32.atomic.rmw.or"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWOr, Type::i32, 4); }
goto parse_error;
case 's':
- if (op == "i32.atomic.rmw.sub"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i32); }
+ if (op == "i32.atomic.rmw.sub"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWSub, Type::i32, 4); }
goto parse_error;
case 'x': {
switch (op[16]) {
case 'c':
- if (op == "i32.atomic.rmw.xchg"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i32); }
+ if (op == "i32.atomic.rmw.xchg"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWXchg, Type::i32, 4); }
goto parse_error;
case 'o':
- if (op == "i32.atomic.rmw.xor"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i32); }
+ if (op == "i32.atomic.rmw.xor"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWXor, Type::i32, 4); }
goto parse_error;
default: goto parse_error;
}
@@ -1289,30 +1289,30 @@ switch (op[0]) {
case 'a': {
switch (op[18]) {
case 'd':
- if (op == "i32.atomic.rmw16.add_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i32); }
+ if (op == "i32.atomic.rmw16.add_u"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWAdd, Type::i32, 2); }
goto parse_error;
case 'n':
- if (op == "i32.atomic.rmw16.and_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i32); }
+ if (op == "i32.atomic.rmw16.and_u"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWAnd, Type::i32, 2); }
goto parse_error;
default: goto parse_error;
}
}
case 'c':
- if (op == "i32.atomic.rmw16.cmpxchg_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i32); }
+ if (op == "i32.atomic.rmw16.cmpxchg_u"sv) { return makeAtomicCmpxchg(s, Type::i32, 2); }
goto parse_error;
case 'o':
- if (op == "i32.atomic.rmw16.or_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i32); }
+ if (op == "i32.atomic.rmw16.or_u"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWOr, Type::i32, 2); }
goto parse_error;
case 's':
- if (op == "i32.atomic.rmw16.sub_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i32); }
+ if (op == "i32.atomic.rmw16.sub_u"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWSub, Type::i32, 2); }
goto parse_error;
case 'x': {
switch (op[18]) {
case 'c':
- if (op == "i32.atomic.rmw16.xchg_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i32); }
+ if (op == "i32.atomic.rmw16.xchg_u"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWXchg, Type::i32, 2); }
goto parse_error;
case 'o':
- if (op == "i32.atomic.rmw16.xor_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i32); }
+ if (op == "i32.atomic.rmw16.xor_u"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWXor, Type::i32, 2); }
goto parse_error;
default: goto parse_error;
}
@@ -1325,30 +1325,30 @@ switch (op[0]) {
case 'a': {
switch (op[17]) {
case 'd':
- if (op == "i32.atomic.rmw8.add_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i32); }
+ if (op == "i32.atomic.rmw8.add_u"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWAdd, Type::i32, 1); }
goto parse_error;
case 'n':
- if (op == "i32.atomic.rmw8.and_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i32); }
+ if (op == "i32.atomic.rmw8.and_u"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWAnd, Type::i32, 1); }
goto parse_error;
default: goto parse_error;
}
}
case 'c':
- if (op == "i32.atomic.rmw8.cmpxchg_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i32); }
+ if (op == "i32.atomic.rmw8.cmpxchg_u"sv) { return makeAtomicCmpxchg(s, Type::i32, 1); }
goto parse_error;
case 'o':
- if (op == "i32.atomic.rmw8.or_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i32); }
+ if (op == "i32.atomic.rmw8.or_u"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWOr, Type::i32, 1); }
goto parse_error;
case 's':
- if (op == "i32.atomic.rmw8.sub_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i32); }
+ if (op == "i32.atomic.rmw8.sub_u"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWSub, Type::i32, 1); }
goto parse_error;
case 'x': {
switch (op[17]) {
case 'c':
- if (op == "i32.atomic.rmw8.xchg_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i32); }
+ if (op == "i32.atomic.rmw8.xchg_u"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWXchg, Type::i32, 1); }
goto parse_error;
case 'o':
- if (op == "i32.atomic.rmw8.xor_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i32); }
+ if (op == "i32.atomic.rmw8.xor_u"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWXor, Type::i32, 1); }
goto parse_error;
default: goto parse_error;
}
@@ -1362,13 +1362,13 @@ switch (op[0]) {
case 's': {
switch (op[16]) {
case '\0':
- if (op == "i32.atomic.store"sv) { return makeStore(s, Type::i32, /*isAtomic=*/true); }
+ if (op == "i32.atomic.store"sv) { return makeStore(s, Type::i32, 4, /*isAtomic=*/true); }
goto parse_error;
case '1':
- if (op == "i32.atomic.store16"sv) { return makeStore(s, Type::i32, /*isAtomic=*/true); }
+ if (op == "i32.atomic.store16"sv) { return makeStore(s, Type::i32, 2, /*isAtomic=*/true); }
goto parse_error;
case '8':
- if (op == "i32.atomic.store8"sv) { return makeStore(s, Type::i32, /*isAtomic=*/true); }
+ if (op == "i32.atomic.store8"sv) { return makeStore(s, Type::i32, 1, /*isAtomic=*/true); }
goto parse_error;
default: goto parse_error;
}
@@ -1474,15 +1474,15 @@ switch (op[0]) {
case 'o': {
switch (op[8]) {
case '\0':
- if (op == "i32.load"sv) { return makeLoad(s, Type::i32, /*isAtomic=*/false); }
+ if (op == "i32.load"sv) { return makeLoad(s, Type::i32, /*signed=*/false, 4, /*isAtomic=*/false); }
goto parse_error;
case '1': {
switch (op[11]) {
case 's':
- if (op == "i32.load16_s"sv) { return makeLoad(s, Type::i32, /*isAtomic=*/false); }
+ if (op == "i32.load16_s"sv) { return makeLoad(s, Type::i32, /*signed=*/true, 2, /*isAtomic=*/false); }
goto parse_error;
case 'u':
- if (op == "i32.load16_u"sv) { return makeLoad(s, Type::i32, /*isAtomic=*/false); }
+ if (op == "i32.load16_u"sv) { return makeLoad(s, Type::i32, /*signed=*/false, 2, /*isAtomic=*/false); }
goto parse_error;
default: goto parse_error;
}
@@ -1490,10 +1490,10 @@ switch (op[0]) {
case '8': {
switch (op[10]) {
case 's':
- if (op == "i32.load8_s"sv) { return makeLoad(s, Type::i32, /*isAtomic=*/false); }
+ if (op == "i32.load8_s"sv) { return makeLoad(s, Type::i32, /*signed=*/true, 1, /*isAtomic=*/false); }
goto parse_error;
case 'u':
- if (op == "i32.load8_u"sv) { return makeLoad(s, Type::i32, /*isAtomic=*/false); }
+ if (op == "i32.load8_u"sv) { return makeLoad(s, Type::i32, /*signed=*/false, 1, /*isAtomic=*/false); }
goto parse_error;
default: goto parse_error;
}
@@ -1586,13 +1586,13 @@ switch (op[0]) {
case 't': {
switch (op[9]) {
case '\0':
- if (op == "i32.store"sv) { return makeStore(s, Type::i32, /*isAtomic=*/false); }
+ if (op == "i32.store"sv) { return makeStore(s, Type::i32, 4, /*isAtomic=*/false); }
goto parse_error;
case '1':
- if (op == "i32.store16"sv) { return makeStore(s, Type::i32, /*isAtomic=*/false); }
+ if (op == "i32.store16"sv) { return makeStore(s, Type::i32, 2, /*isAtomic=*/false); }
goto parse_error;
case '8':
- if (op == "i32.store8"sv) { return makeStore(s, Type::i32, /*isAtomic=*/false); }
+ if (op == "i32.store8"sv) { return makeStore(s, Type::i32, 1, /*isAtomic=*/false); }
goto parse_error;
default: goto parse_error;
}
@@ -1998,16 +1998,16 @@ switch (op[0]) {
case 'l': {
switch (op[15]) {
case '\0':
- if (op == "i64.atomic.load"sv) { return makeLoad(s, Type::i64, /*isAtomic=*/true); }
+ if (op == "i64.atomic.load"sv) { return makeLoad(s, Type::i64, /*signed=*/false, 8, /*isAtomic=*/true); }
goto parse_error;
case '1':
- if (op == "i64.atomic.load16_u"sv) { return makeLoad(s, Type::i64, /*isAtomic=*/true); }
+ if (op == "i64.atomic.load16_u"sv) { return makeLoad(s, Type::i64, /*signed=*/false, 2, /*isAtomic=*/true); }
goto parse_error;
case '3':
- if (op == "i64.atomic.load32_u"sv) { return makeLoad(s, Type::i64, /*isAtomic=*/true); }
+ if (op == "i64.atomic.load32_u"sv) { return makeLoad(s, Type::i64, /*signed=*/false, 4, /*isAtomic=*/true); }
goto parse_error;
case '8':
- if (op == "i64.atomic.load8_u"sv) { return makeLoad(s, Type::i64, /*isAtomic=*/true); }
+ if (op == "i64.atomic.load8_u"sv) { return makeLoad(s, Type::i64, /*signed=*/false, 1, /*isAtomic=*/true); }
goto parse_error;
default: goto parse_error;
}
@@ -2019,30 +2019,30 @@ switch (op[0]) {
case 'a': {
switch (op[16]) {
case 'd':
- if (op == "i64.atomic.rmw.add"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i64); }
+ if (op == "i64.atomic.rmw.add"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWAdd, Type::i64, 8); }
goto parse_error;
case 'n':
- if (op == "i64.atomic.rmw.and"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i64); }
+ if (op == "i64.atomic.rmw.and"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWAnd, Type::i64, 8); }
goto parse_error;
default: goto parse_error;
}
}
case 'c':
- if (op == "i64.atomic.rmw.cmpxchg"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i64); }
+ if (op == "i64.atomic.rmw.cmpxchg"sv) { return makeAtomicCmpxchg(s, Type::i64, 8); }
goto parse_error;
case 'o':
- if (op == "i64.atomic.rmw.or"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i64); }
+ if (op == "i64.atomic.rmw.or"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWOr, Type::i64, 8); }
goto parse_error;
case 's':
- if (op == "i64.atomic.rmw.sub"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i64); }
+ if (op == "i64.atomic.rmw.sub"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWSub, Type::i64, 8); }
goto parse_error;
case 'x': {
switch (op[16]) {
case 'c':
- if (op == "i64.atomic.rmw.xchg"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i64); }
+ if (op == "i64.atomic.rmw.xchg"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWXchg, Type::i64, 8); }
goto parse_error;
case 'o':
- if (op == "i64.atomic.rmw.xor"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i64); }
+ if (op == "i64.atomic.rmw.xor"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWXor, Type::i64, 8); }
goto parse_error;
default: goto parse_error;
}
@@ -2055,30 +2055,30 @@ switch (op[0]) {
case 'a': {
switch (op[18]) {
case 'd':
- if (op == "i64.atomic.rmw16.add_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i64); }
+ if (op == "i64.atomic.rmw16.add_u"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWAdd, Type::i64, 2); }
goto parse_error;
case 'n':
- if (op == "i64.atomic.rmw16.and_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i64); }
+ if (op == "i64.atomic.rmw16.and_u"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWAnd, Type::i64, 2); }
goto parse_error;
default: goto parse_error;
}
}
case 'c':
- if (op == "i64.atomic.rmw16.cmpxchg_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i64); }
+ if (op == "i64.atomic.rmw16.cmpxchg_u"sv) { return makeAtomicCmpxchg(s, Type::i64, 2); }
goto parse_error;
case 'o':
- if (op == "i64.atomic.rmw16.or_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i64); }
+ if (op == "i64.atomic.rmw16.or_u"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWOr, Type::i64, 2); }
goto parse_error;
case 's':
- if (op == "i64.atomic.rmw16.sub_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i64); }
+ if (op == "i64.atomic.rmw16.sub_u"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWSub, Type::i64, 2); }
goto parse_error;
case 'x': {
switch (op[18]) {
case 'c':
- if (op == "i64.atomic.rmw16.xchg_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i64); }
+ if (op == "i64.atomic.rmw16.xchg_u"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWXchg, Type::i64, 2); }
goto parse_error;
case 'o':
- if (op == "i64.atomic.rmw16.xor_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i64); }
+ if (op == "i64.atomic.rmw16.xor_u"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWXor, Type::i64, 2); }
goto parse_error;
default: goto parse_error;
}
@@ -2091,30 +2091,30 @@ switch (op[0]) {
case 'a': {
switch (op[18]) {
case 'd':
- if (op == "i64.atomic.rmw32.add_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i64); }
+ if (op == "i64.atomic.rmw32.add_u"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWAdd, Type::i64, 4); }
goto parse_error;
case 'n':
- if (op == "i64.atomic.rmw32.and_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i64); }
+ if (op == "i64.atomic.rmw32.and_u"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWAnd, Type::i64, 4); }
goto parse_error;
default: goto parse_error;
}
}
case 'c':
- if (op == "i64.atomic.rmw32.cmpxchg_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i64); }
+ if (op == "i64.atomic.rmw32.cmpxchg_u"sv) { return makeAtomicCmpxchg(s, Type::i64, 4); }
goto parse_error;
case 'o':
- if (op == "i64.atomic.rmw32.or_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i64); }
+ if (op == "i64.atomic.rmw32.or_u"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWOr, Type::i64, 4); }
goto parse_error;
case 's':
- if (op == "i64.atomic.rmw32.sub_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i64); }
+ if (op == "i64.atomic.rmw32.sub_u"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWSub, Type::i64, 4); }
goto parse_error;
case 'x': {
switch (op[18]) {
case 'c':
- if (op == "i64.atomic.rmw32.xchg_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i64); }
+ if (op == "i64.atomic.rmw32.xchg_u"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWXchg, Type::i64, 4); }
goto parse_error;
case 'o':
- if (op == "i64.atomic.rmw32.xor_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i64); }
+ if (op == "i64.atomic.rmw32.xor_u"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWXor, Type::i64, 4); }
goto parse_error;
default: goto parse_error;
}
@@ -2127,30 +2127,30 @@ switch (op[0]) {
case 'a': {
switch (op[17]) {
case 'd':
- if (op == "i64.atomic.rmw8.add_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i64); }
+ if (op == "i64.atomic.rmw8.add_u"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWAdd, Type::i64, 1); }
goto parse_error;
case 'n':
- if (op == "i64.atomic.rmw8.and_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i64); }
+ if (op == "i64.atomic.rmw8.and_u"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWAnd, Type::i64, 1); }
goto parse_error;
default: goto parse_error;
}
}
case 'c':
- if (op == "i64.atomic.rmw8.cmpxchg_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i64); }
+ if (op == "i64.atomic.rmw8.cmpxchg_u"sv) { return makeAtomicCmpxchg(s, Type::i64, 1); }
goto parse_error;
case 'o':
- if (op == "i64.atomic.rmw8.or_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i64); }
+ if (op == "i64.atomic.rmw8.or_u"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWOr, Type::i64, 1); }
goto parse_error;
case 's':
- if (op == "i64.atomic.rmw8.sub_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i64); }
+ if (op == "i64.atomic.rmw8.sub_u"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWSub, Type::i64, 1); }
goto parse_error;
case 'x': {
switch (op[17]) {
case 'c':
- if (op == "i64.atomic.rmw8.xchg_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i64); }
+ if (op == "i64.atomic.rmw8.xchg_u"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWXchg, Type::i64, 1); }
goto parse_error;
case 'o':
- if (op == "i64.atomic.rmw8.xor_u"sv) { return makeAtomicRMWOrCmpxchg(s, Type::i64); }
+ if (op == "i64.atomic.rmw8.xor_u"sv) { return makeAtomicRMW(s, AtomicRMWOp::RMWXor, Type::i64, 1); }
goto parse_error;
default: goto parse_error;
}
@@ -2164,16 +2164,16 @@ switch (op[0]) {
case 's': {
switch (op[16]) {
case '\0':
- if (op == "i64.atomic.store"sv) { return makeStore(s, Type::i64, /*isAtomic=*/true); }
+ if (op == "i64.atomic.store"sv) { return makeStore(s, Type::i64, 8, /*isAtomic=*/true); }
goto parse_error;
case '1':
- if (op == "i64.atomic.store16"sv) { return makeStore(s, Type::i64, /*isAtomic=*/true); }
+ if (op == "i64.atomic.store16"sv) { return makeStore(s, Type::i64, 2, /*isAtomic=*/true); }
goto parse_error;
case '3':
- if (op == "i64.atomic.store32"sv) { return makeStore(s, Type::i64, /*isAtomic=*/true); }
+ if (op == "i64.atomic.store32"sv) { return makeStore(s, Type::i64, 4, /*isAtomic=*/true); }
goto parse_error;
case '8':
- if (op == "i64.atomic.store8"sv) { return makeStore(s, Type::i64, /*isAtomic=*/true); }
+ if (op == "i64.atomic.store8"sv) { return makeStore(s, Type::i64, 1, /*isAtomic=*/true); }
goto parse_error;
default: goto parse_error;
}
@@ -2293,15 +2293,15 @@ switch (op[0]) {
case 'o': {
switch (op[8]) {
case '\0':
- if (op == "i64.load"sv) { return makeLoad(s, Type::i64, /*isAtomic=*/false); }
+ if (op == "i64.load"sv) { return makeLoad(s, Type::i64, /*signed=*/false, 8, /*isAtomic=*/false); }
goto parse_error;
case '1': {
switch (op[11]) {
case 's':
- if (op == "i64.load16_s"sv) { return makeLoad(s, Type::i64, /*isAtomic=*/false); }
+ if (op == "i64.load16_s"sv) { return makeLoad(s, Type::i64, /*signed=*/true, 2, /*isAtomic=*/false); }
goto parse_error;
case 'u':
- if (op == "i64.load16_u"sv) { return makeLoad(s, Type::i64, /*isAtomic=*/false); }
+ if (op == "i64.load16_u"sv) { return makeLoad(s, Type::i64, /*signed=*/false, 2, /*isAtomic=*/false); }
goto parse_error;
default: goto parse_error;
}
@@ -2309,10 +2309,10 @@ switch (op[0]) {
case '3': {
switch (op[11]) {
case 's':
- if (op == "i64.load32_s"sv) { return makeLoad(s, Type::i64, /*isAtomic=*/false); }
+ if (op == "i64.load32_s"sv) { return makeLoad(s, Type::i64, /*signed=*/true, 4, /*isAtomic=*/false); }
goto parse_error;
case 'u':
- if (op == "i64.load32_u"sv) { return makeLoad(s, Type::i64, /*isAtomic=*/false); }
+ if (op == "i64.load32_u"sv) { return makeLoad(s, Type::i64, /*signed=*/false, 4, /*isAtomic=*/false); }
goto parse_error;
default: goto parse_error;
}
@@ -2320,10 +2320,10 @@ switch (op[0]) {
case '8': {
switch (op[10]) {
case 's':
- if (op == "i64.load8_s"sv) { return makeLoad(s, Type::i64, /*isAtomic=*/false); }
+ if (op == "i64.load8_s"sv) { return makeLoad(s, Type::i64, /*signed=*/true, 1, /*isAtomic=*/false); }
goto parse_error;
case 'u':
- if (op == "i64.load8_u"sv) { return makeLoad(s, Type::i64, /*isAtomic=*/false); }
+ if (op == "i64.load8_u"sv) { return makeLoad(s, Type::i64, /*signed=*/false, 1, /*isAtomic=*/false); }
goto parse_error;
default: goto parse_error;
}
@@ -2416,16 +2416,16 @@ switch (op[0]) {
case 't': {
switch (op[9]) {
case '\0':
- if (op == "i64.store"sv) { return makeStore(s, Type::i64, /*isAtomic=*/false); }
+ if (op == "i64.store"sv) { return makeStore(s, Type::i64, 8, /*isAtomic=*/false); }
goto parse_error;
case '1':
- if (op == "i64.store16"sv) { return makeStore(s, Type::i64, /*isAtomic=*/false); }
+ if (op == "i64.store16"sv) { return makeStore(s, Type::i64, 2, /*isAtomic=*/false); }
goto parse_error;
case '3':
- if (op == "i64.store32"sv) { return makeStore(s, Type::i64, /*isAtomic=*/false); }
+ if (op == "i64.store32"sv) { return makeStore(s, Type::i64, 4, /*isAtomic=*/false); }
goto parse_error;
case '8':
- if (op == "i64.store8"sv) { return makeStore(s, Type::i64, /*isAtomic=*/false); }
+ if (op == "i64.store8"sv) { return makeStore(s, Type::i64, 1, /*isAtomic=*/false); }
goto parse_error;
default: goto parse_error;
}
@@ -3389,7 +3389,7 @@ switch (op[0]) {
case 'l': {
switch (op[9]) {
case '\0':
- if (op == "v128.load"sv) { return makeLoad(s, Type::v128, /*isAtomic=*/false); }
+ if (op == "v128.load"sv) { return makeLoad(s, Type::v128, /*signed=*/false, 16, /*isAtomic=*/false); }
goto parse_error;
case '1': {
switch (op[11]) {
@@ -3501,7 +3501,7 @@ switch (op[0]) {
case 's': {
switch (op[10]) {
case '\0':
- if (op == "v128.store"sv) { return makeStore(s, Type::v128, /*isAtomic=*/false); }
+ if (op == "v128.store"sv) { return makeStore(s, Type::v128, 16, /*isAtomic=*/false); }
goto parse_error;
case '1':
if (op == "v128.store16_lane"sv) { return makeSIMDLoadStoreLane(s, SIMDLoadStoreLaneOp::Store16LaneVec128); }
@@ -4033,7 +4033,7 @@ switch (op[0]) {
goto parse_error;
case 'o':
if (op == "f32.load"sv) {
- auto ret = makeLoad(ctx, pos, Type::f32, /*isAtomic=*/false);
+ auto ret = makeLoad(ctx, pos, Type::f32, /*signed=*/false, 4, /*isAtomic=*/false);
CHECK_ERR(ret);
return *ret;
}
@@ -4118,7 +4118,7 @@ switch (op[0]) {
goto parse_error;
case 't':
if (op == "f32.store"sv) {
- auto ret = makeStore(ctx, pos, Type::f32, /*isAtomic=*/false);
+ auto ret = makeStore(ctx, pos, Type::f32, 4, /*isAtomic=*/false);
CHECK_ERR(ret);
return *ret;
}
@@ -4596,7 +4596,7 @@ switch (op[0]) {
goto parse_error;
case 'o':
if (op == "f64.load"sv) {
- auto ret = makeLoad(ctx, pos, Type::f64, /*isAtomic=*/false);
+ auto ret = makeLoad(ctx, pos, Type::f64, /*signed=*/false, 8, /*isAtomic=*/false);
CHECK_ERR(ret);
return *ret;
}
@@ -4688,7 +4688,7 @@ switch (op[0]) {
goto parse_error;
case 't':
if (op == "f64.store"sv) {
- auto ret = makeStore(ctx, pos, Type::f64, /*isAtomic=*/false);
+ auto ret = makeStore(ctx, pos, Type::f64, 8, /*isAtomic=*/false);
CHECK_ERR(ret);
return *ret;
}
@@ -5599,21 +5599,21 @@ switch (op[0]) {
switch (op[15]) {
case '\0':
if (op == "i32.atomic.load"sv) {
- auto ret = makeLoad(ctx, pos, Type::i32, /*isAtomic=*/true);
+ auto ret = makeLoad(ctx, pos, Type::i32, /*signed=*/false, 4, /*isAtomic=*/true);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case '1':
if (op == "i32.atomic.load16_u"sv) {
- auto ret = makeLoad(ctx, pos, Type::i32, /*isAtomic=*/true);
+ auto ret = makeLoad(ctx, pos, Type::i32, /*signed=*/false, 2, /*isAtomic=*/true);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case '8':
if (op == "i32.atomic.load8_u"sv) {
- auto ret = makeLoad(ctx, pos, Type::i32, /*isAtomic=*/true);
+ auto ret = makeLoad(ctx, pos, Type::i32, /*signed=*/false, 1, /*isAtomic=*/true);
CHECK_ERR(ret);
return *ret;
}
@@ -5629,14 +5629,14 @@ switch (op[0]) {
switch (op[16]) {
case 'd':
if (op == "i32.atomic.rmw.add"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i32);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWAdd, Type::i32, 4);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case 'n':
if (op == "i32.atomic.rmw.and"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i32);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWAnd, Type::i32, 4);
CHECK_ERR(ret);
return *ret;
}
@@ -5646,21 +5646,21 @@ switch (op[0]) {
}
case 'c':
if (op == "i32.atomic.rmw.cmpxchg"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i32);
+ auto ret = makeAtomicCmpxchg(ctx, pos, Type::i32, 4);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case 'o':
if (op == "i32.atomic.rmw.or"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i32);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWOr, Type::i32, 4);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case 's':
if (op == "i32.atomic.rmw.sub"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i32);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWSub, Type::i32, 4);
CHECK_ERR(ret);
return *ret;
}
@@ -5669,14 +5669,14 @@ switch (op[0]) {
switch (op[16]) {
case 'c':
if (op == "i32.atomic.rmw.xchg"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i32);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWXchg, Type::i32, 4);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case 'o':
if (op == "i32.atomic.rmw.xor"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i32);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWXor, Type::i32, 4);
CHECK_ERR(ret);
return *ret;
}
@@ -5693,14 +5693,14 @@ switch (op[0]) {
switch (op[18]) {
case 'd':
if (op == "i32.atomic.rmw16.add_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i32);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWAdd, Type::i32, 2);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case 'n':
if (op == "i32.atomic.rmw16.and_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i32);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWAnd, Type::i32, 2);
CHECK_ERR(ret);
return *ret;
}
@@ -5710,21 +5710,21 @@ switch (op[0]) {
}
case 'c':
if (op == "i32.atomic.rmw16.cmpxchg_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i32);
+ auto ret = makeAtomicCmpxchg(ctx, pos, Type::i32, 2);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case 'o':
if (op == "i32.atomic.rmw16.or_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i32);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWOr, Type::i32, 2);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case 's':
if (op == "i32.atomic.rmw16.sub_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i32);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWSub, Type::i32, 2);
CHECK_ERR(ret);
return *ret;
}
@@ -5733,14 +5733,14 @@ switch (op[0]) {
switch (op[18]) {
case 'c':
if (op == "i32.atomic.rmw16.xchg_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i32);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWXchg, Type::i32, 2);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case 'o':
if (op == "i32.atomic.rmw16.xor_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i32);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWXor, Type::i32, 2);
CHECK_ERR(ret);
return *ret;
}
@@ -5757,14 +5757,14 @@ switch (op[0]) {
switch (op[17]) {
case 'd':
if (op == "i32.atomic.rmw8.add_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i32);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWAdd, Type::i32, 1);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case 'n':
if (op == "i32.atomic.rmw8.and_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i32);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWAnd, Type::i32, 1);
CHECK_ERR(ret);
return *ret;
}
@@ -5774,21 +5774,21 @@ switch (op[0]) {
}
case 'c':
if (op == "i32.atomic.rmw8.cmpxchg_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i32);
+ auto ret = makeAtomicCmpxchg(ctx, pos, Type::i32, 1);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case 'o':
if (op == "i32.atomic.rmw8.or_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i32);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWOr, Type::i32, 1);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case 's':
if (op == "i32.atomic.rmw8.sub_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i32);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWSub, Type::i32, 1);
CHECK_ERR(ret);
return *ret;
}
@@ -5797,14 +5797,14 @@ switch (op[0]) {
switch (op[17]) {
case 'c':
if (op == "i32.atomic.rmw8.xchg_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i32);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWXchg, Type::i32, 1);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case 'o':
if (op == "i32.atomic.rmw8.xor_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i32);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWXor, Type::i32, 1);
CHECK_ERR(ret);
return *ret;
}
@@ -5822,21 +5822,21 @@ switch (op[0]) {
switch (op[16]) {
case '\0':
if (op == "i32.atomic.store"sv) {
- auto ret = makeStore(ctx, pos, Type::i32, /*isAtomic=*/true);
+ auto ret = makeStore(ctx, pos, Type::i32, 4, /*isAtomic=*/true);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case '1':
if (op == "i32.atomic.store16"sv) {
- auto ret = makeStore(ctx, pos, Type::i32, /*isAtomic=*/true);
+ auto ret = makeStore(ctx, pos, Type::i32, 2, /*isAtomic=*/true);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case '8':
if (op == "i32.atomic.store8"sv) {
- auto ret = makeStore(ctx, pos, Type::i32, /*isAtomic=*/true);
+ auto ret = makeStore(ctx, pos, Type::i32, 1, /*isAtomic=*/true);
CHECK_ERR(ret);
return *ret;
}
@@ -6006,7 +6006,7 @@ switch (op[0]) {
switch (op[8]) {
case '\0':
if (op == "i32.load"sv) {
- auto ret = makeLoad(ctx, pos, Type::i32, /*isAtomic=*/false);
+ auto ret = makeLoad(ctx, pos, Type::i32, /*signed=*/false, 4, /*isAtomic=*/false);
CHECK_ERR(ret);
return *ret;
}
@@ -6015,14 +6015,14 @@ switch (op[0]) {
switch (op[11]) {
case 's':
if (op == "i32.load16_s"sv) {
- auto ret = makeLoad(ctx, pos, Type::i32, /*isAtomic=*/false);
+ auto ret = makeLoad(ctx, pos, Type::i32, /*signed=*/true, 2, /*isAtomic=*/false);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case 'u':
if (op == "i32.load16_u"sv) {
- auto ret = makeLoad(ctx, pos, Type::i32, /*isAtomic=*/false);
+ auto ret = makeLoad(ctx, pos, Type::i32, /*signed=*/false, 2, /*isAtomic=*/false);
CHECK_ERR(ret);
return *ret;
}
@@ -6034,14 +6034,14 @@ switch (op[0]) {
switch (op[10]) {
case 's':
if (op == "i32.load8_s"sv) {
- auto ret = makeLoad(ctx, pos, Type::i32, /*isAtomic=*/false);
+ auto ret = makeLoad(ctx, pos, Type::i32, /*signed=*/true, 1, /*isAtomic=*/false);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case 'u':
if (op == "i32.load8_u"sv) {
- auto ret = makeLoad(ctx, pos, Type::i32, /*isAtomic=*/false);
+ auto ret = makeLoad(ctx, pos, Type::i32, /*signed=*/false, 1, /*isAtomic=*/false);
CHECK_ERR(ret);
return *ret;
}
@@ -6194,21 +6194,21 @@ switch (op[0]) {
switch (op[9]) {
case '\0':
if (op == "i32.store"sv) {
- auto ret = makeStore(ctx, pos, Type::i32, /*isAtomic=*/false);
+ auto ret = makeStore(ctx, pos, Type::i32, 4, /*isAtomic=*/false);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case '1':
if (op == "i32.store16"sv) {
- auto ret = makeStore(ctx, pos, Type::i32, /*isAtomic=*/false);
+ auto ret = makeStore(ctx, pos, Type::i32, 2, /*isAtomic=*/false);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case '8':
if (op == "i32.store8"sv) {
- auto ret = makeStore(ctx, pos, Type::i32, /*isAtomic=*/false);
+ auto ret = makeStore(ctx, pos, Type::i32, 1, /*isAtomic=*/false);
CHECK_ERR(ret);
return *ret;
}
@@ -6862,28 +6862,28 @@ switch (op[0]) {
switch (op[15]) {
case '\0':
if (op == "i64.atomic.load"sv) {
- auto ret = makeLoad(ctx, pos, Type::i64, /*isAtomic=*/true);
+ auto ret = makeLoad(ctx, pos, Type::i64, /*signed=*/false, 8, /*isAtomic=*/true);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case '1':
if (op == "i64.atomic.load16_u"sv) {
- auto ret = makeLoad(ctx, pos, Type::i64, /*isAtomic=*/true);
+ auto ret = makeLoad(ctx, pos, Type::i64, /*signed=*/false, 2, /*isAtomic=*/true);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case '3':
if (op == "i64.atomic.load32_u"sv) {
- auto ret = makeLoad(ctx, pos, Type::i64, /*isAtomic=*/true);
+ auto ret = makeLoad(ctx, pos, Type::i64, /*signed=*/false, 4, /*isAtomic=*/true);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case '8':
if (op == "i64.atomic.load8_u"sv) {
- auto ret = makeLoad(ctx, pos, Type::i64, /*isAtomic=*/true);
+ auto ret = makeLoad(ctx, pos, Type::i64, /*signed=*/false, 1, /*isAtomic=*/true);
CHECK_ERR(ret);
return *ret;
}
@@ -6899,14 +6899,14 @@ switch (op[0]) {
switch (op[16]) {
case 'd':
if (op == "i64.atomic.rmw.add"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i64);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWAdd, Type::i64, 8);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case 'n':
if (op == "i64.atomic.rmw.and"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i64);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWAnd, Type::i64, 8);
CHECK_ERR(ret);
return *ret;
}
@@ -6916,21 +6916,21 @@ switch (op[0]) {
}
case 'c':
if (op == "i64.atomic.rmw.cmpxchg"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i64);
+ auto ret = makeAtomicCmpxchg(ctx, pos, Type::i64, 8);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case 'o':
if (op == "i64.atomic.rmw.or"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i64);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWOr, Type::i64, 8);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case 's':
if (op == "i64.atomic.rmw.sub"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i64);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWSub, Type::i64, 8);
CHECK_ERR(ret);
return *ret;
}
@@ -6939,14 +6939,14 @@ switch (op[0]) {
switch (op[16]) {
case 'c':
if (op == "i64.atomic.rmw.xchg"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i64);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWXchg, Type::i64, 8);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case 'o':
if (op == "i64.atomic.rmw.xor"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i64);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWXor, Type::i64, 8);
CHECK_ERR(ret);
return *ret;
}
@@ -6963,14 +6963,14 @@ switch (op[0]) {
switch (op[18]) {
case 'd':
if (op == "i64.atomic.rmw16.add_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i64);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWAdd, Type::i64, 2);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case 'n':
if (op == "i64.atomic.rmw16.and_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i64);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWAnd, Type::i64, 2);
CHECK_ERR(ret);
return *ret;
}
@@ -6980,21 +6980,21 @@ switch (op[0]) {
}
case 'c':
if (op == "i64.atomic.rmw16.cmpxchg_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i64);
+ auto ret = makeAtomicCmpxchg(ctx, pos, Type::i64, 2);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case 'o':
if (op == "i64.atomic.rmw16.or_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i64);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWOr, Type::i64, 2);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case 's':
if (op == "i64.atomic.rmw16.sub_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i64);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWSub, Type::i64, 2);
CHECK_ERR(ret);
return *ret;
}
@@ -7003,14 +7003,14 @@ switch (op[0]) {
switch (op[18]) {
case 'c':
if (op == "i64.atomic.rmw16.xchg_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i64);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWXchg, Type::i64, 2);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case 'o':
if (op == "i64.atomic.rmw16.xor_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i64);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWXor, Type::i64, 2);
CHECK_ERR(ret);
return *ret;
}
@@ -7027,14 +7027,14 @@ switch (op[0]) {
switch (op[18]) {
case 'd':
if (op == "i64.atomic.rmw32.add_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i64);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWAdd, Type::i64, 4);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case 'n':
if (op == "i64.atomic.rmw32.and_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i64);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWAnd, Type::i64, 4);
CHECK_ERR(ret);
return *ret;
}
@@ -7044,21 +7044,21 @@ switch (op[0]) {
}
case 'c':
if (op == "i64.atomic.rmw32.cmpxchg_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i64);
+ auto ret = makeAtomicCmpxchg(ctx, pos, Type::i64, 4);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case 'o':
if (op == "i64.atomic.rmw32.or_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i64);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWOr, Type::i64, 4);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case 's':
if (op == "i64.atomic.rmw32.sub_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i64);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWSub, Type::i64, 4);
CHECK_ERR(ret);
return *ret;
}
@@ -7067,14 +7067,14 @@ switch (op[0]) {
switch (op[18]) {
case 'c':
if (op == "i64.atomic.rmw32.xchg_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i64);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWXchg, Type::i64, 4);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case 'o':
if (op == "i64.atomic.rmw32.xor_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i64);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWXor, Type::i64, 4);
CHECK_ERR(ret);
return *ret;
}
@@ -7091,14 +7091,14 @@ switch (op[0]) {
switch (op[17]) {
case 'd':
if (op == "i64.atomic.rmw8.add_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i64);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWAdd, Type::i64, 1);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case 'n':
if (op == "i64.atomic.rmw8.and_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i64);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWAnd, Type::i64, 1);
CHECK_ERR(ret);
return *ret;
}
@@ -7108,21 +7108,21 @@ switch (op[0]) {
}
case 'c':
if (op == "i64.atomic.rmw8.cmpxchg_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i64);
+ auto ret = makeAtomicCmpxchg(ctx, pos, Type::i64, 1);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case 'o':
if (op == "i64.atomic.rmw8.or_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i64);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWOr, Type::i64, 1);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case 's':
if (op == "i64.atomic.rmw8.sub_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i64);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWSub, Type::i64, 1);
CHECK_ERR(ret);
return *ret;
}
@@ -7131,14 +7131,14 @@ switch (op[0]) {
switch (op[17]) {
case 'c':
if (op == "i64.atomic.rmw8.xchg_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i64);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWXchg, Type::i64, 1);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case 'o':
if (op == "i64.atomic.rmw8.xor_u"sv) {
- auto ret = makeAtomicRMWOrCmpxchg(ctx, pos, Type::i64);
+ auto ret = makeAtomicRMW(ctx, pos, AtomicRMWOp::RMWXor, Type::i64, 1);
CHECK_ERR(ret);
return *ret;
}
@@ -7156,28 +7156,28 @@ switch (op[0]) {
switch (op[16]) {
case '\0':
if (op == "i64.atomic.store"sv) {
- auto ret = makeStore(ctx, pos, Type::i64, /*isAtomic=*/true);
+ auto ret = makeStore(ctx, pos, Type::i64, 8, /*isAtomic=*/true);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case '1':
if (op == "i64.atomic.store16"sv) {
- auto ret = makeStore(ctx, pos, Type::i64, /*isAtomic=*/true);
+ auto ret = makeStore(ctx, pos, Type::i64, 2, /*isAtomic=*/true);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case '3':
if (op == "i64.atomic.store32"sv) {
- auto ret = makeStore(ctx, pos, Type::i64, /*isAtomic=*/true);
+ auto ret = makeStore(ctx, pos, Type::i64, 4, /*isAtomic=*/true);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case '8':
if (op == "i64.atomic.store8"sv) {
- auto ret = makeStore(ctx, pos, Type::i64, /*isAtomic=*/true);
+ auto ret = makeStore(ctx, pos, Type::i64, 1, /*isAtomic=*/true);
CHECK_ERR(ret);
return *ret;
}
@@ -7373,7 +7373,7 @@ switch (op[0]) {
switch (op[8]) {
case '\0':
if (op == "i64.load"sv) {
- auto ret = makeLoad(ctx, pos, Type::i64, /*isAtomic=*/false);
+ auto ret = makeLoad(ctx, pos, Type::i64, /*signed=*/false, 8, /*isAtomic=*/false);
CHECK_ERR(ret);
return *ret;
}
@@ -7382,14 +7382,14 @@ switch (op[0]) {
switch (op[11]) {
case 's':
if (op == "i64.load16_s"sv) {
- auto ret = makeLoad(ctx, pos, Type::i64, /*isAtomic=*/false);
+ auto ret = makeLoad(ctx, pos, Type::i64, /*signed=*/true, 2, /*isAtomic=*/false);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case 'u':
if (op == "i64.load16_u"sv) {
- auto ret = makeLoad(ctx, pos, Type::i64, /*isAtomic=*/false);
+ auto ret = makeLoad(ctx, pos, Type::i64, /*signed=*/false, 2, /*isAtomic=*/false);
CHECK_ERR(ret);
return *ret;
}
@@ -7401,14 +7401,14 @@ switch (op[0]) {
switch (op[11]) {
case 's':
if (op == "i64.load32_s"sv) {
- auto ret = makeLoad(ctx, pos, Type::i64, /*isAtomic=*/false);
+ auto ret = makeLoad(ctx, pos, Type::i64, /*signed=*/true, 4, /*isAtomic=*/false);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case 'u':
if (op == "i64.load32_u"sv) {
- auto ret = makeLoad(ctx, pos, Type::i64, /*isAtomic=*/false);
+ auto ret = makeLoad(ctx, pos, Type::i64, /*signed=*/false, 4, /*isAtomic=*/false);
CHECK_ERR(ret);
return *ret;
}
@@ -7420,14 +7420,14 @@ switch (op[0]) {
switch (op[10]) {
case 's':
if (op == "i64.load8_s"sv) {
- auto ret = makeLoad(ctx, pos, Type::i64, /*isAtomic=*/false);
+ auto ret = makeLoad(ctx, pos, Type::i64, /*signed=*/true, 1, /*isAtomic=*/false);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case 'u':
if (op == "i64.load8_u"sv) {
- auto ret = makeLoad(ctx, pos, Type::i64, /*isAtomic=*/false);
+ auto ret = makeLoad(ctx, pos, Type::i64, /*signed=*/false, 1, /*isAtomic=*/false);
CHECK_ERR(ret);
return *ret;
}
@@ -7580,28 +7580,28 @@ switch (op[0]) {
switch (op[9]) {
case '\0':
if (op == "i64.store"sv) {
- auto ret = makeStore(ctx, pos, Type::i64, /*isAtomic=*/false);
+ auto ret = makeStore(ctx, pos, Type::i64, 8, /*isAtomic=*/false);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case '1':
if (op == "i64.store16"sv) {
- auto ret = makeStore(ctx, pos, Type::i64, /*isAtomic=*/false);
+ auto ret = makeStore(ctx, pos, Type::i64, 2, /*isAtomic=*/false);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case '3':
if (op == "i64.store32"sv) {
- auto ret = makeStore(ctx, pos, Type::i64, /*isAtomic=*/false);
+ auto ret = makeStore(ctx, pos, Type::i64, 4, /*isAtomic=*/false);
CHECK_ERR(ret);
return *ret;
}
goto parse_error;
case '8':
if (op == "i64.store8"sv) {
- auto ret = makeStore(ctx, pos, Type::i64, /*isAtomic=*/false);
+ auto ret = makeStore(ctx, pos, Type::i64, 1, /*isAtomic=*/false);
CHECK_ERR(ret);
return *ret;
}
@@ -9205,7 +9205,7 @@ switch (op[0]) {
switch (op[9]) {
case '\0':
if (op == "v128.load"sv) {
- auto ret = makeLoad(ctx, pos, Type::v128, /*isAtomic=*/false);
+ auto ret = makeLoad(ctx, pos, Type::v128, /*signed=*/false, 16, /*isAtomic=*/false);
CHECK_ERR(ret);
return *ret;
}
@@ -9393,7 +9393,7 @@ switch (op[0]) {
switch (op[10]) {
case '\0':
if (op == "v128.store"sv) {
- auto ret = makeStore(ctx, pos, Type::v128, /*isAtomic=*/false);
+ auto ret = makeStore(ctx, pos, Type::v128, 16, /*isAtomic=*/false);
CHECK_ERR(ret);
return *ret;
}
diff --git a/src/wasm-s-parser.h b/src/wasm-s-parser.h
index a0edc4b7a..1470701e4 100644
--- a/src/wasm-s-parser.h
+++ b/src/wasm-s-parser.h
@@ -224,13 +224,12 @@ private:
Expression* makeBlock(Element& s);
Expression* makeThenOrElse(Element& s);
Expression* makeConst(Element& s, Type type);
- Expression* makeLoad(Element& s, Type type, bool isAtomic);
- Expression* makeStore(Element& s, Type type, bool isAtomic);
- Expression* makeAtomicRMWOrCmpxchg(Element& s, Type type);
Expression*
- makeAtomicRMW(Element& s, Type type, uint8_t bytes, const char* extra);
+ makeLoad(Element& s, Type type, bool signed_, int bytes, bool isAtomic);
+ Expression* makeStore(Element& s, Type type, int bytes, bool isAtomic);
Expression*
- makeAtomicCmpxchg(Element& s, Type type, uint8_t bytes, const char* extra);
+ makeAtomicRMW(Element& s, AtomicRMWOp op, Type type, uint8_t bytes);
+ Expression* makeAtomicCmpxchg(Element& s, Type type, uint8_t bytes);
Expression* makeAtomicWait(Element& s, Type type);
Expression* makeAtomicNotify(Element& s);
Expression* makeAtomicFence(Element& s);
diff --git a/src/wasm/wasm-s-parser.cpp b/src/wasm/wasm-s-parser.cpp
index 78ac84f42..347bbb713 100644
--- a/src/wasm/wasm-s-parser.cpp
+++ b/src/wasm/wasm-s-parser.cpp
@@ -1885,37 +1885,11 @@ Expression* SExpressionWasmBuilder::makeConst(Element& s, Type type) {
return ret;
}
-static uint8_t parseMemBytes(const char*& s, uint8_t fallback) {
- uint8_t ret;
- if (s[0] == '8') {
- ret = 1;
- s++;
- } else if (s[0] == '1') {
- if (s[1] != '6') {
- throw ParseException(std::string("expected 16 for memop size: ") + s);
- }
- ret = 2;
- s += 2;
- } else if (s[0] == '3') {
- if (s[1] != '2') {
- throw ParseException(std::string("expected 32 for memop size: ") + s);
- };
- ret = 4;
- s += 2;
- } else {
- ret = fallback;
- }
- return ret;
-}
-
static size_t parseMemAttributes(size_t i,
Element& s,
Address& offset,
Address& align,
- Address fallbackAlign,
bool memory64) {
- offset = 0;
- align = fallbackAlign;
// Parse "align=X" and "offset=X" arguments, bailing out on anything else.
while (!s[i]->isList()) {
const char* str = s[i]->str().str.data();
@@ -1956,23 +1930,6 @@ static size_t parseMemAttributes(size_t i,
return i;
}
-static const char* findMemExtra(const Element& s, size_t skip, bool isAtomic) {
- auto* str = s.str().str.data();
- auto size = strlen(str);
- auto* ret = strchr(str, '.');
- if (!ret) {
- throw ParseException("missing '.' in memory access", s.line, s.col);
- }
- ret += skip;
- if (isAtomic) {
- ret += 7; // after "type.atomic.load"
- }
- if (ret > str + size) {
- throw ParseException("memory access ends abruptly", s.line, s.col);
- }
- return ret;
-}
-
bool SExpressionWasmBuilder::hasMemoryIdx(Element& s,
Index defaultSize,
Index i) {
@@ -1984,14 +1941,15 @@ bool SExpressionWasmBuilder::hasMemoryIdx(Element& s,
return false;
}
-Expression*
-SExpressionWasmBuilder::makeLoad(Element& s, Type type, bool isAtomic) {
- const char* extra = findMemExtra(*s[0], 5 /* after "type.load" */, isAtomic);
+Expression* SExpressionWasmBuilder::makeLoad(
+ Element& s, Type type, bool signed_, int bytes, bool isAtomic) {
auto* ret = allocator.alloc<Load>();
- ret->isAtomic = isAtomic;
ret->type = type;
- ret->bytes = parseMemBytes(extra, type.getByteSize());
- ret->signed_ = extra[0] && extra[1] == 's';
+ ret->bytes = bytes;
+ ret->signed_ = signed_;
+ ret->offset = 0;
+ ret->align = bytes;
+ ret->isAtomic = isAtomic;
Index i = 1;
Name memory;
// Check to make sure there are more than the default args & this str isn't
@@ -2002,20 +1960,22 @@ SExpressionWasmBuilder::makeLoad(Element& s, Type type, bool isAtomic) {
memory = getMemoryNameAtIdx(0);
}
ret->memory = memory;
- i = parseMemAttributes(
- i, s, ret->offset, ret->align, ret->bytes, isMemory64(memory));
+ i = parseMemAttributes(i, s, ret->offset, ret->align, isMemory64(memory));
ret->ptr = parseExpression(s[i]);
ret->finalize();
return ret;
}
-Expression*
-SExpressionWasmBuilder::makeStore(Element& s, Type type, bool isAtomic) {
- const char* extra = findMemExtra(*s[0], 6 /* after "type.store" */, isAtomic);
+Expression* SExpressionWasmBuilder::makeStore(Element& s,
+ Type type,
+ int bytes,
+ bool isAtomic) {
auto ret = allocator.alloc<Store>();
+ ret->bytes = bytes;
+ ret->offset = 0;
+ ret->align = bytes;
ret->isAtomic = isAtomic;
ret->valueType = type;
- ret->bytes = parseMemBytes(extra, type.getByteSize());
Index i = 1;
Name memory;
// Check to make sure there are more than the default args & this str isn't
@@ -2026,51 +1986,22 @@ SExpressionWasmBuilder::makeStore(Element& s, Type type, bool isAtomic) {
memory = getMemoryNameAtIdx(0);
}
ret->memory = memory;
- i = parseMemAttributes(
- i, s, ret->offset, ret->align, ret->bytes, isMemory64(memory));
+ i = parseMemAttributes(i, s, ret->offset, ret->align, isMemory64(memory));
ret->ptr = parseExpression(s[i]);
ret->value = parseExpression(s[i + 1]);
ret->finalize();
return ret;
}
-Expression* SExpressionWasmBuilder::makeAtomicRMWOrCmpxchg(Element& s,
- Type type) {
- const char* extra = findMemExtra(
- *s[0], 11 /* after "type.atomic.rmw" */, /* isAtomic = */ false);
- auto bytes = parseMemBytes(extra, type.getByteSize());
- extra = strchr(extra, '.'); // after the optional '_u' and before the opcode
- if (!extra) {
- throw ParseException("malformed atomic rmw instruction", s.line, s.col);
- }
- extra++; // after the '.'
- if (!strncmp(extra, "cmpxchg", 7)) {
- return makeAtomicCmpxchg(s, type, bytes, extra);
- }
- return makeAtomicRMW(s, type, bytes, extra);
-}
Expression* SExpressionWasmBuilder::makeAtomicRMW(Element& s,
+ AtomicRMWOp op,
Type type,
- uint8_t bytes,
- const char* extra) {
+ uint8_t bytes) {
auto ret = allocator.alloc<AtomicRMW>();
ret->type = type;
+ ret->op = op;
ret->bytes = bytes;
- if (!strncmp(extra, "add", 3)) {
- ret->op = RMWAdd;
- } else if (!strncmp(extra, "and", 3)) {
- ret->op = RMWAnd;
- } else if (!strncmp(extra, "or", 2)) {
- ret->op = RMWOr;
- } else if (!strncmp(extra, "sub", 3)) {
- ret->op = RMWSub;
- } else if (!strncmp(extra, "xor", 3)) {
- ret->op = RMWXor;
- } else if (!strncmp(extra, "xchg", 4)) {
- ret->op = RMWXchg;
- } else {
- throw ParseException("bad atomic rmw operator", s.line, s.col);
- }
+ ret->offset = 0;
Index i = 1;
Name memory;
// Check to make sure there are more than the default args & this str isn't
@@ -2081,9 +2012,8 @@ Expression* SExpressionWasmBuilder::makeAtomicRMW(Element& s,
memory = getMemoryNameAtIdx(0);
}
ret->memory = memory;
- Address align;
- i = parseMemAttributes(
- i, s, ret->offset, align, ret->bytes, isMemory64(memory));
+ Address align = bytes;
+ i = parseMemAttributes(i, s, ret->offset, align, isMemory64(memory));
if (align != ret->bytes) {
throw ParseException("Align of Atomic RMW must match size", s.line, s.col);
}
@@ -2095,13 +2025,12 @@ Expression* SExpressionWasmBuilder::makeAtomicRMW(Element& s,
Expression* SExpressionWasmBuilder::makeAtomicCmpxchg(Element& s,
Type type,
- uint8_t bytes,
- const char* extra) {
+ uint8_t bytes) {
auto ret = allocator.alloc<AtomicCmpxchg>();
ret->type = type;
ret->bytes = bytes;
+ ret->offset = 0;
Index i = 1;
- Address align;
Name memory;
// Check to make sure there are more than the default args & this str isn't
// the mem attributes
@@ -2111,8 +2040,8 @@ Expression* SExpressionWasmBuilder::makeAtomicCmpxchg(Element& s,
memory = getMemoryNameAtIdx(0);
}
ret->memory = memory;
- i = parseMemAttributes(
- i, s, ret->offset, align, ret->bytes, isMemory64(memory));
+ Address align = ret->bytes;
+ i = parseMemAttributes(i, s, ret->offset, align, isMemory64(memory));
if (align != ret->bytes) {
throw ParseException(
"Align of Atomic Cmpxchg must match size", s.line, s.col);
@@ -2127,16 +2056,8 @@ Expression* SExpressionWasmBuilder::makeAtomicCmpxchg(Element& s,
Expression* SExpressionWasmBuilder::makeAtomicWait(Element& s, Type type) {
auto ret = allocator.alloc<AtomicWait>();
ret->type = Type::i32;
+ ret->offset = 0;
ret->expectedType = type;
- Address align;
- Address expectedAlign;
- if (type == Type::i32) {
- expectedAlign = 4;
- } else if (type == Type::i64) {
- expectedAlign = 8;
- } else {
- WASM_UNREACHABLE("Invalid prefix for memory.atomic.wait");
- }
Index i = 1;
Name memory;
// Check to make sure there are more than the default args & this str isn't
@@ -2147,8 +2068,9 @@ Expression* SExpressionWasmBuilder::makeAtomicWait(Element& s, Type type) {
memory = getMemoryNameAtIdx(0);
}
ret->memory = memory;
- i = parseMemAttributes(
- i, s, ret->offset, align, expectedAlign, isMemory64(memory));
+ Address expectedAlign = type == Type::i64 ? 8 : 4;
+ Address align = expectedAlign;
+ i = parseMemAttributes(i, s, ret->offset, align, isMemory64(memory));
if (align != expectedAlign) {
throw ParseException(
"Align of memory.atomic.wait must match size", s.line, s.col);
@@ -2163,6 +2085,7 @@ Expression* SExpressionWasmBuilder::makeAtomicWait(Element& s, Type type) {
Expression* SExpressionWasmBuilder::makeAtomicNotify(Element& s) {
auto ret = allocator.alloc<AtomicNotify>();
ret->type = Type::i32;
+ ret->offset = 0;
Index i = 1;
Name memory;
// Check to make sure there are more than the default args & this str isn't
@@ -2173,8 +2096,8 @@ Expression* SExpressionWasmBuilder::makeAtomicNotify(Element& s) {
memory = getMemoryNameAtIdx(0);
}
ret->memory = memory;
- Address align;
- i = parseMemAttributes(i, s, ret->offset, align, 4, isMemory64(memory));
+ Address align = 4;
+ i = parseMemAttributes(i, s, ret->offset, align, isMemory64(memory));
if (align != 4) {
throw ParseException(
"Align of memory.atomic.notify must be 4", s.line, s.col);
@@ -2260,17 +2183,17 @@ Expression* SExpressionWasmBuilder::makeSIMDShift(Element& s, SIMDShiftOp op) {
Expression* SExpressionWasmBuilder::makeSIMDLoad(Element& s, SIMDLoadOp op) {
auto ret = allocator.alloc<SIMDLoad>();
ret->op = op;
- Address defaultAlign;
+ ret->offset = 0;
switch (op) {
case Load8SplatVec128:
- defaultAlign = 1;
+ ret->align = 1;
break;
case Load16SplatVec128:
- defaultAlign = 2;
+ ret->align = 2;
break;
case Load32SplatVec128:
case Load32ZeroVec128:
- defaultAlign = 4;
+ ret->align = 4;
break;
case Load64SplatVec128:
case Load8x8SVec128:
@@ -2280,7 +2203,7 @@ Expression* SExpressionWasmBuilder::makeSIMDLoad(Element& s, SIMDLoadOp op) {
case Load32x2SVec128:
case Load32x2UVec128:
case Load64ZeroVec128:
- defaultAlign = 8;
+ ret->align = 8;
break;
}
Index i = 1;
@@ -2293,8 +2216,7 @@ Expression* SExpressionWasmBuilder::makeSIMDLoad(Element& s, SIMDLoadOp op) {
memory = getMemoryNameAtIdx(0);
}
ret->memory = memory;
- i = parseMemAttributes(
- i, s, ret->offset, ret->align, defaultAlign, isMemory64(memory));
+ i = parseMemAttributes(i, s, ret->offset, ret->align, isMemory64(memory));
ret->ptr = parseExpression(s[i]);
ret->finalize();
return ret;
@@ -2305,27 +2227,27 @@ SExpressionWasmBuilder::makeSIMDLoadStoreLane(Element& s,
SIMDLoadStoreLaneOp op) {
auto* ret = allocator.alloc<SIMDLoadStoreLane>();
ret->op = op;
- Address defaultAlign;
+ ret->offset = 0;
size_t lanes;
switch (op) {
case Load8LaneVec128:
case Store8LaneVec128:
- defaultAlign = 1;
+ ret->align = 1;
lanes = 16;
break;
case Load16LaneVec128:
case Store16LaneVec128:
- defaultAlign = 2;
+ ret->align = 2;
lanes = 8;
break;
case Load32LaneVec128:
case Store32LaneVec128:
- defaultAlign = 4;
+ ret->align = 4;
lanes = 4;
break;
case Load64LaneVec128:
case Store64LaneVec128:
- defaultAlign = 8;
+ ret->align = 8;
lanes = 2;
break;
default:
@@ -2341,8 +2263,7 @@ SExpressionWasmBuilder::makeSIMDLoadStoreLane(Element& s,
memory = getMemoryNameAtIdx(0);
}
ret->memory = memory;
- i = parseMemAttributes(
- i, s, ret->offset, ret->align, defaultAlign, isMemory64(memory));
+ i = parseMemAttributes(i, s, ret->offset, ret->align, isMemory64(memory));
ret->index = parseLaneIndex(s[i++], lanes);
ret->ptr = parseExpression(s[i++]);
ret->vec = parseExpression(s[i]);
diff --git a/src/wasm/wat-parser.cpp b/src/wasm/wat-parser.cpp
index 8d85e4f45..6bfca9da6 100644
--- a/src/wasm/wat-parser.cpp
+++ b/src/wasm/wat-parser.cpp
@@ -1555,17 +1555,17 @@ template<typename Ctx> Result<typename Ctx::InstrT> makeThenOrElse(Ctx&, Index);
template<typename Ctx>
Result<typename Ctx::InstrT> makeConst(Ctx&, Index, Type type);
template<typename Ctx>
-Result<typename Ctx::InstrT> makeLoad(Ctx&, Index, Type type, bool isAtomic);
-template<typename Ctx>
-Result<typename Ctx::InstrT> makeStore(Ctx&, Index, Type type, bool isAtomic);
+Result<typename Ctx::InstrT>
+makeLoad(Ctx&, Index, Type type, bool signed_, int bytes, bool isAtomic);
template<typename Ctx>
-Result<typename Ctx::InstrT> makeAtomicRMWOrCmpxchg(Ctx&, Index, Type type);
+Result<typename Ctx::InstrT>
+makeStore(Ctx&, Index, Type type, int bytes, bool isAtomic);
template<typename Ctx>
Result<typename Ctx::InstrT>
-makeAtomicRMW(Ctx&, Index, Type type, uint8_t bytes, const char* extra);
+makeAtomicRMW(Ctx&, Index, AtomicRMWOp op, Type type, uint8_t bytes);
template<typename Ctx>
Result<typename Ctx::InstrT>
-makeAtomicCmpxchg(Ctx&, Index, Type type, uint8_t bytes, const char* extra);
+makeAtomicCmpxchg(Ctx&, Index, Type type, uint8_t bytes);
template<typename Ctx>
Result<typename Ctx::InstrT> makeAtomicWait(Ctx&, Index, Type type);
template<typename Ctx>
@@ -2244,32 +2244,26 @@ Result<typename Ctx::InstrT> makeConst(Ctx& ctx, Index pos, Type type) {
}
template<typename Ctx>
-Result<typename Ctx::InstrT>
-makeLoad(Ctx& ctx, Index pos, Type type, bool isAtomic) {
+Result<typename Ctx::InstrT> makeLoad(
+ Ctx& ctx, Index pos, Type type, bool signed_, int bytes, bool isAtomic) {
return ctx.in.err("unimplemented instruction");
}
template<typename Ctx>
Result<typename Ctx::InstrT>
-makeStore(Ctx& ctx, Index pos, Type type, bool isAtomic) {
+makeStore(Ctx& ctx, Index pos, Type type, int bytes, bool isAtomic) {
return ctx.in.err("unimplemented instruction");
}
template<typename Ctx>
Result<typename Ctx::InstrT>
-makeAtomicRMWOrCmpxchg(Ctx& ctx, Index pos, Type type) {
+makeAtomicRMW(Ctx& ctx, Index pos, AtomicRMWOp op, Type type, uint8_t bytes) {
return ctx.in.err("unimplemented instruction");
}
template<typename Ctx>
-Result<typename Ctx::InstrT> makeAtomicRMW(
- Ctx& ctx, Index pos, Type type, uint8_t bytes, const char* extra) {
- return ctx.in.err("unimplemented instruction");
-}
-
-template<typename Ctx>
-Result<typename Ctx::InstrT> makeAtomicCmpxchg(
- Ctx& ctx, Index pos, Type type, uint8_t bytes, const char* extra) {
+Result<typename Ctx::InstrT>
+makeAtomicCmpxchg(Ctx& ctx, Index pos, Type type, uint8_t bytes) {
return ctx.in.err("unimplemented instruction");
}
generated by cgit v1.2.3 (git 2.39.1) at 2025-08-10 03:32:12 +0000