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authorThomas Lively <7121787+tlively@users.noreply.github.com>2019-04-12 18:27:13 -0700
committerGitHub <noreply@github.com>2019-04-12 18:27:13 -0700
commit9495b338121140d585648d64fb99e8ef7f92f867 (patch)
tree57418b1f685a4a5a43ee291759f64e9a763b1245 /test/unit/test_features.py
parent883d14de7157950063f74b81658d00df0d53be8d (diff)
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Move features from passOptions to Module (#2001)
This allows us to emit a (potentially modified) target features section and conditionally emit other sections such as the DataCount section based on the presence of features.
Diffstat (limited to 'test/unit/test_features.py')
-rw-r--r--test/unit/test_features.py14
1 files changed, 14 insertions, 0 deletions
diff --git a/test/unit/test_features.py b/test/unit/test_features.py
index f9c410414..f130e1408 100644
--- a/test/unit/test_features.py
+++ b/test/unit/test_features.py
@@ -124,23 +124,37 @@ class TargetFeaturesSectionTest(unittest.TestCase):
self.assertEqual(p.stderr, '')
return p.stdout
+ def roundtrip(self, filename):
+ path = os.path.join(options.binaryen_test, 'unit', 'input', filename)
+ p = run_process(WASM_OPT + ['-g', '-o', '-', path], check=False,
+ capture_output=True)
+ self.assertEqual(p.returncode, 0)
+ self.assertEqual(p.stderr, '')
+ with open(path, 'rb') as f:
+ self.assertEqual(str(p.stdout), str(f.read()))
+
def test_atomics(self):
+ self.roundtrip('atomics_target_feature.wasm')
module = self.disassemble('atomics_target_feature.wasm')
self.assertIn('i32.atomic.rmw.add', module)
def test_bulk_memory(self):
+ self.roundtrip('bulkmem_target_feature.wasm')
module = self.disassemble('bulkmem_target_feature.wasm')
self.assertIn('memory.copy', module)
def test_nontrapping_fptoint(self):
+ self.roundtrip('truncsat_target_feature.wasm')
module = self.disassemble('truncsat_target_feature.wasm')
self.assertIn('i32.trunc_sat_f32_u', module)
def test_sign_ext(self):
+ self.roundtrip('signext_target_feature.wasm')
module = self.disassemble('signext_target_feature.wasm')
self.assertIn('i32.extend8_s', module)
def test_simd(self):
+ self.roundtrip('simd_target_feature.wasm')
module = self.disassemble('simd_target_feature.wasm')
self.assertIn('i32x4.splat', module)