summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--src/wasm/literal.cpp5
-rw-r--r--test/spec/f16.wast7
2 files changed, 11 insertions, 1 deletions
diff --git a/src/wasm/literal.cpp b/src/wasm/literal.cpp
index e332db305..e8641cbd7 100644
--- a/src/wasm/literal.cpp
+++ b/src/wasm/literal.cpp
@@ -1834,7 +1834,10 @@ Literal Literal::replaceLaneI64x2(const Literal& other, uint8_t index) const {
return replace<2, &Literal::getLanesI64x2>(*this, other, index);
}
Literal Literal::replaceLaneF16x8(const Literal& other, uint8_t index) const {
- return replace<8, &Literal::getLanesF16x8>(
+ // For F16 lane replacement we do not need to convert all the values to F32,
+ // instead keep the lanes as I32, and just replace the one lane with the
+ // integer value of the F32.
+ return replace<8, &Literal::getLanesUI16x8>(
*this, other.convertF32ToF16(), index);
}
Literal Literal::replaceLaneF32x4(const Literal& other, uint8_t index) const {
diff --git a/test/spec/f16.wast b/test/spec/f16.wast
index d5de0c0e8..f0d2b0678 100644
--- a/test/spec/f16.wast
+++ b/test/spec/f16.wast
@@ -34,6 +34,9 @@
(func (export "f16x8.nearest") (param $0 v128) (result v128) (f16x8.nearest (local.get $0)))
(func (export "f16x8.relaxed_madd") (param $0 v128) (param $1 v128) (param $2 v128) (result v128) (f16x8.relaxed_madd (local.get $0) (local.get $1) (local.get $2)))
(func (export "f16x8.relaxed_nmadd") (param $0 v128) (param $1 v128) (param $2 v128) (result v128) (f16x8.relaxed_nmadd (local.get $0) (local.get $1) (local.get $2)))
+ ;; Multiple operation tests:
+ (func (export "splat_replace") (result v128) (f16x8.replace_lane 0 (f16x8.splat (f32.const 1)) (f32.const 99))
+ )
)
(assert_return (invoke "f32.load_f16") (f32.const 42.0))
@@ -216,3 +219,7 @@
(v128.const i16x8 0x7c00 0x7c00 0xbc00 0 0x3c00 0x4000 0x3c00 0xbc00))
;; inf inf -2 0 0 -0.25 9 -2
(v128.const i16x8 0x7c00 0x7c00 0xc000 0 0 0xb400 0x4880 0xc000))
+
+(assert_return (invoke "splat_replace")
+ (v128.const i16x8 0x5630 0x3c00 0x3c00 0x3c00 0x3c00 0x3c00 0x3c00 0x3c00)
+)