summaryrefslogtreecommitdiff
path: root/src/wasm/wasm-s-parser.cpp
diff options
context:
space:
mode:
Diffstat (limited to 'src/wasm/wasm-s-parser.cpp')
-rw-r--r--src/wasm/wasm-s-parser.cpp43
1 files changed, 43 insertions, 0 deletions
diff --git a/src/wasm/wasm-s-parser.cpp b/src/wasm/wasm-s-parser.cpp
index c4de76987..4e06a75bb 100644
--- a/src/wasm/wasm-s-parser.cpp
+++ b/src/wasm/wasm-s-parser.cpp
@@ -1300,8 +1300,12 @@ static size_t parseMemAttributes(Element& s,
size_t i = 1;
offset = 0;
align = fallbackAlign;
+ // Parse "align=X" and "offset=X" arguments, bailing out on anything else.
while (!s[i]->isList()) {
const char* str = s[i]->c_str();
+ if (strncmp(str, "align", 5) != 0 && strncmp(str, "offset", 6) != 0) {
+ return i;
+ }
const char* eq = strchr(str, '=');
if (!eq) {
throw ParseException(
@@ -1592,6 +1596,45 @@ Expression* SExpressionWasmBuilder::makeSIMDLoad(Element& s, SIMDLoadOp op) {
return ret;
}
+Expression*
+SExpressionWasmBuilder::makeSIMDLoadStoreLane(Element& s,
+ SIMDLoadStoreLaneOp op) {
+ auto* ret = allocator.alloc<SIMDLoadStoreLane>();
+ ret->op = op;
+ Address defaultAlign;
+ size_t lanes;
+ switch (op) {
+ case LoadLaneVec8x16:
+ case StoreLaneVec8x16:
+ defaultAlign = 1;
+ lanes = 16;
+ break;
+ case LoadLaneVec16x8:
+ case StoreLaneVec16x8:
+ defaultAlign = 2;
+ lanes = 8;
+ break;
+ case LoadLaneVec32x4:
+ case StoreLaneVec32x4:
+ defaultAlign = 4;
+ lanes = 4;
+ break;
+ case LoadLaneVec64x2:
+ case StoreLaneVec64x2:
+ defaultAlign = 8;
+ lanes = 2;
+ break;
+ default:
+ WASM_UNREACHABLE("Unexpected SIMDLoadStoreLane op");
+ }
+ size_t i = parseMemAttributes(s, ret->offset, ret->align, defaultAlign);
+ ret->index = parseLaneIndex(s[i++], lanes);
+ ret->ptr = parseExpression(s[i++]);
+ ret->vec = parseExpression(s[i]);
+ ret->finalize();
+ return ret;
+}
+
Expression* SExpressionWasmBuilder::makeMemoryInit(Element& s) {
auto ret = allocator.alloc<MemoryInit>();
ret->segment = atoi(s[1]->str().c_str());