4 files changed, 66 insertions, 0 deletions
diff --git a/src/wasm/literal.cpp b/src/wasm/literal.cpp
index a532b92d0..b0dcf5177 100644
--- a/src/wasm/literal.cpp
+++ b/src/wasm/literal.cpp
@@ -2209,6 +2209,24 @@ Literal Literal::geSI64x2(const Literal& other) const {
   return compare<2, &Literal::getLanesI64x2, &Literal::geS, int64_t>(*this,
                                                                      other);
 }
+Literal Literal::eqF16x8(const Literal& other) const {
+  return compare<8, &Literal::getLanesF16x8, &Literal::eq>(*this, other);
+}
+Literal Literal::neF16x8(const Literal& other) const {
+  return compare<8, &Literal::getLanesF16x8, &Literal::ne>(*this, other);
+}
+Literal Literal::ltF16x8(const Literal& other) const {
+  return compare<8, &Literal::getLanesF16x8, &Literal::lt>(*this, other);
+}
+Literal Literal::gtF16x8(const Literal& other) const {
+  return compare<8, &Literal::getLanesF16x8, &Literal::gt>(*this, other);
+}
+Literal Literal::leF16x8(const Literal& other) const {
+  return compare<8, &Literal::getLanesF16x8, &Literal::le>(*this, other);
+}
+Literal Literal::geF16x8(const Literal& other) const {
+  return compare<8, &Literal::getLanesF16x8, &Literal::ge>(*this, other);
+}
 Literal Literal::eqF32x4(const Literal& other) const {
   return compare<4, &Literal::getLanesF32x4, &Literal::eq>(*this, other);
 }
diff --git a/src/wasm/wasm-binary.cpp b/src/wasm/wasm-binary.cpp
index 5eaa84515..d9985212f 100644
--- a/src/wasm/wasm-binary.cpp
+++ b/src/wasm/wasm-binary.cpp
@@ -5846,6 +5846,30 @@ bool WasmBinaryReader::maybeVisitSIMDBinary(Expression*& out, uint32_t code) {
       curr = allocator.alloc<Binary>();
       curr->op = GeSVecI64x2;
       break;
+    case BinaryConsts::F16x8Eq:
+      curr = allocator.alloc<Binary>();
+      curr->op = EqVecF16x8;
+      break;
+    case BinaryConsts::F16x8Ne:
+      curr = allocator.alloc<Binary>();
+      curr->op = NeVecF16x8;
+      break;
+    case BinaryConsts::F16x8Lt:
+      curr = allocator.alloc<Binary>();
+      curr->op = LtVecF16x8;
+      break;
+    case BinaryConsts::F16x8Gt:
+      curr = allocator.alloc<Binary>();
+      curr->op = GtVecF16x8;
+      break;
+    case BinaryConsts::F16x8Le:
+      curr = allocator.alloc<Binary>();
+      curr->op = LeVecF16x8;
+      break;
+    case BinaryConsts::F16x8Ge:
+      curr = allocator.alloc<Binary>();
+      curr->op = GeVecF16x8;
+      break;
     case BinaryConsts::F32x4Eq:
       curr = allocator.alloc<Binary>();
       curr->op = EqVecF32x4;
diff --git a/src/wasm/wasm-stack.cpp b/src/wasm/wasm-stack.cpp
index 19b98769b..a9b582f43 100644
--- a/src/wasm/wasm-stack.cpp
+++ b/src/wasm/wasm-stack.cpp
@@ -1643,6 +1643,24 @@ void BinaryInstWriter::visitBinary(Binary* curr) {
     case GeSVecI64x2:
       o << int8_t(BinaryConsts::SIMDPrefix) << U32LEB(BinaryConsts::I64x2GeS);
       break;
+    case EqVecF16x8:
+      o << int8_t(BinaryConsts::SIMDPrefix) << U32LEB(BinaryConsts::F16x8Eq);
+      break;
+    case NeVecF16x8:
+      o << int8_t(BinaryConsts::SIMDPrefix) << U32LEB(BinaryConsts::F16x8Ne);
+      break;
+    case LtVecF16x8:
+      o << int8_t(BinaryConsts::SIMDPrefix) << U32LEB(BinaryConsts::F16x8Lt);
+      break;
+    case GtVecF16x8:
+      o << int8_t(BinaryConsts::SIMDPrefix) << U32LEB(BinaryConsts::F16x8Gt);
+      break;
+    case LeVecF16x8:
+      o << int8_t(BinaryConsts::SIMDPrefix) << U32LEB(BinaryConsts::F16x8Le);
+      break;
+    case GeVecF16x8:
+      o << int8_t(BinaryConsts::SIMDPrefix) << U32LEB(BinaryConsts::F16x8Ge);
+      break;
     case EqVecF32x4:
       o << int8_t(BinaryConsts::SIMDPrefix) << U32LEB(BinaryConsts::F32x4Eq);
       break;
diff --git a/src/wasm/wasm-validator.cpp b/src/wasm/wasm-validator.cpp
index 6e59ce8d8..b35d1b3be 100644
--- a/src/wasm/wasm-validator.cpp
+++ b/src/wasm/wasm-validator.cpp
@@ -1743,6 +1743,12 @@ void FunctionValidator::visitBinary(Binary* curr) {
     case LeSVecI64x2:
     case GtSVecI64x2:
     case GeSVecI64x2:
+    case EqVecF16x8:
+    case NeVecF16x8:
+    case LtVecF16x8:
+    case LeVecF16x8:
+    case GtVecF16x8:
+    case GeVecF16x8:
     case EqVecF32x4:
     case NeVecF32x4:
     case LtVecF32x4: