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authorLaurent Mazare <laurent.mazare@gmail.com>2023-08-23 10:42:19 +0100
committerGitHub <noreply@github.com>2023-08-23 10:42:19 +0100
commit9a5c7db91a40bfeab1dbaf1622c67a21f5ad19b8 (patch)
tree4c7fef2cdb78409ca30e14981c783d717cd49f97 /candle-pyo3
parent3743bed2d7bc02069770902e4a956aeabaef5453 (diff)
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Add support for i64 (#563)
* Add the i64 dtype. * Adapt the cuda kernels.
Diffstat (limited to 'candle-pyo3')
-rw-r--r--candle-pyo3/src/lib.rs6
1 files changed, 6 insertions, 0 deletions
diff --git a/candle-pyo3/src/lib.rs b/candle-pyo3/src/lib.rs
index 1ff4db06..b3cc9374 100644
--- a/candle-pyo3/src/lib.rs
+++ b/candle-pyo3/src/lib.rs
@@ -136,6 +136,7 @@ macro_rules! pydtype {
}
pydtype!(u8, |v| v);
pydtype!(u32, |v| v);
+pydtype!(i64, |v| v);
pydtype!(f16, f32::from);
pydtype!(bf16, f32::from);
pydtype!(f32, |v| v);
@@ -150,6 +151,7 @@ trait MapDType {
match t.dtype() {
DType::U8 => self.f::<u8>(t),
DType::U32 => self.f::<u32>(t),
+ DType::I64 => self.f::<i64>(t),
DType::BF16 => self.f::<bf16>(t),
DType::F16 => self.f::<f16>(t),
DType::F32 => self.f::<f32>(t),
@@ -166,8 +168,12 @@ impl PyTensor {
use Device::Cpu;
let tensor = if let Ok(vs) = vs.extract::<u32>(py) {
Tensor::new(vs, &Cpu).map_err(wrap_err)?
+ } else if let Ok(vs) = vs.extract::<i64>(py) {
+ Tensor::new(vs, &Cpu).map_err(wrap_err)?
} else if let Ok(vs) = vs.extract::<Vec<u32>>(py) {
Tensor::new(vs.as_slice(), &Cpu).map_err(wrap_err)?
+ } else if let Ok(vs) = vs.extract::<Vec<i64>>(py) {
+ Tensor::new(vs.as_slice(), &Cpu).map_err(wrap_err)?
} else if let Ok(vs) = vs.extract::<f32>(py) {
Tensor::new(vs, &Cpu).map_err(wrap_err)?
} else if let Ok(vs) = vs.extract::<Vec<f32>>(py) {