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author | Paul Eggert <eggert@cs.ucla.edu> | 2017-07-06 00:23:30 -0700 |
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committer | Paul Eggert <eggert@cs.ucla.edu> | 2017-07-06 00:24:56 -0700 |
commit | 20e9a00fb5d12ad408f9dd15adcfcd205783c1b0 (patch) | |
tree | 3d464df7b404345185989cbf6d0380a039c1ce0b /lisp/ChangeLog.16 | |
parent | 7a0170de20fe1225d3eeac099d1e61a0c0410bf3 (diff) | |
download | emacs-20e9a00fb5d12ad408f9dd15adcfcd205783c1b0.tar.gz emacs-20e9a00fb5d12ad408f9dd15adcfcd205783c1b0.tar.bz2 emacs-20e9a00fb5d12ad408f9dd15adcfcd205783c1b0.zip |
Spelling fixes
* lisp/org/org-table.el (org-table-sort-lines):
Fix misspelling in prompt.
* lisp/org/ox-ascii.el (org-ascii--describe-datum):
Fix misspelling in call to org-element-lineage.
Diffstat (limited to 'lisp/ChangeLog.16')
-rw-r--r-- | lisp/ChangeLog.16 | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lisp/ChangeLog.16 b/lisp/ChangeLog.16 index 691b7945bf4..ffd99f7438c 100644 --- a/lisp/ChangeLog.16 +++ b/lisp/ChangeLog.16 @@ -11992,11 +11992,11 @@ * progmodes/verilog-mode.el (verilog-pretty-expr): Don't line up assignment with tests in ifs and for loops. (verilog-extended-complete-re, verilog-complete-reg): Change so - that DPI inport functions don't look like fuction declarations. + that DPI inport functions don't look like function declarations. (verilog-pretty-expr): Don't line up assignment operations to the test and increment in if and for loops (verilog-extended-complete-re, verilog-complete-reg): Change so - that DPI inport functions don't look like fuction declarations. + that DPI inport functions don't look like function declarations. 2012-05-03 Kenichi Handa <handa@m17n.org> |