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| author | Cyril Arnould <cyril.arnould@outlook.com> | 2023-05-03 19:40:18 +0000 |
|---|---|---|
| committer | Eli Zaretskii <eliz@gnu.org> | 2023-05-05 08:45:29 +0300 |
| commit | a2d4cd06f455e815c0c01434458b810367a66c92 (patch) | |
| tree | 987c6697823d3d5b1bd3230cbb6d2de2f1258596 /lisp/progmodes/vhdl-mode.el | |
| parent | 2f3a514b6db5e0d0453c56a4f201088ea99d5139 (diff) | |
| download | emacs-a2d4cd06f455e815c0c01434458b810367a66c92.tar.gz emacs-a2d4cd06f455e815c0c01434458b810367a66c92.tar.bz2 emacs-a2d4cd06f455e815c0c01434458b810367a66c92.zip | |
Improve VHDL mode highlighting
* lisp/progmodes/vhdl-mode.el (vhdl-compiler-alist): Differentiate
between ModelSim errors, warnings, and notes when highlighting
them. Add a new entry for Xilinx Vivado. (Bug#63251)
Copyright-paperwork-exempt: yes
Diffstat (limited to 'lisp/progmodes/vhdl-mode.el')
| -rw-r--r-- | lisp/progmodes/vhdl-mode.el | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/lisp/progmodes/vhdl-mode.el b/lisp/progmodes/vhdl-mode.el index 45fd17f65c4..ee0ec63b6bc 100644 --- a/lisp/progmodes/vhdl-mode.el +++ b/lisp/progmodes/vhdl-mode.el @@ -286,7 +286,7 @@ Overrides local variable `indent-tabs-mode'." ;; counter_rtl.vhd(29):Conditional signal assignment line__29 ("ModelSim" "vcom" "-93 -work \\1" "make" "-f \\1" nil "vlib \\1; vmap \\2 \\1" "./" "work/" "Makefile" "modelsim" - ("^\\(ERROR\\|WARNING\\|\\*\\* Error\\|\\*\\* Warning\\)[^:]*:\\( *\\[[0-9]+]\\| ([^)]+)\\)? \\([^ \t\n]+\\)(\\([0-9]+\\)):" 3 4 nil) + ("^\\(?:\\(?1:ERROR\\|\\*\\* Error\\)\\|\\(?2:WARNING\\|\\*\\* Warning\\)\\|\\(?3:NOTE\\|\\*\\* Note\\)\\)[^:]*:\\( *\\[[0-9]+]\\| ([^)]+)\\)? \\(?4:[^ \t\n]+\\)(\\(?5:[0-9]+\\)):" 4 5 nil (2 . 3)) ("" 0) ("\\1/_primary.dat" "\\2/\\1.dat" "\\1/_primary.dat" "\\1/_primary.dat" "\\1/body.dat" downcase)) @@ -385,6 +385,13 @@ Overrides local variable `indent-tabs-mode'." nil "mkdir \\1" "./" "work/" "Makefile" "xilinx" ("^ERROR:HDLParsers:[0-9]+ - \"\\([^ \t\n]+\\)\" Line \\([0-9]+\\)\\." 1 2 nil) ("" 0) nil) + ;; Xilinx Vivado: + ;; ERROR: [VRFC 10-1412] syntax error near o_idle [test.vhd:23] + ("Xilinx Vivado" "xvhdl" "" "make" "-f \\1" + nil "mkdir \\1" "./" "work" "Makefile" "vivado" + ("^\\(?:\\(?1:ERROR\\)\\|\\(?2:WARNING\\)\\|\\(?3:INFO\\)\\): \\(.+\\) \\[\\(?4:[^ \t\n]+\\):\\(?5:[0-9]+\\)\\]" 4 5 nil (2 . 3)) ("" 0) + ("\\1/entity" "\\2/\\1" "\\1/configuration" + "\\1/package" "\\1/body" downcase)) ) "List of available VHDL compilers and their properties. Each list entry specifies the following items for a compiler: |