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authorDan Nicolaescu <dann@ics.uci.edu>2008-02-04 16:36:48 +0000
committerDan Nicolaescu <dann@ics.uci.edu>2008-02-04 16:36:48 +0000
commit7e2a60001ef4611850e77105dac5ec443a023288 (patch)
treea09e5e27243528ddb84411b4ddcabf20857d6af5 /src/syntax.c
parentcb11476b222555583a5afe3f61d08fc8191d0ccc (diff)
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* progmodes/verilog-mode.el (verilog-declaration-core-re):
Add port directions by themselves, with no qualification, as base item of a declaration. (verilog-pretty-declarations): Add new flag that inhibits printing to the message buffer. (verilog-pretty-expr): Add new flag that inhibits printing to the message buffer. Improve handling of the many types of expression line up. (verilog-just-one-space): Don't print an empty message. (verilog-get-lineup-indent): Rework to support the better handling of expression lineup for verilog-pretty-expr. (verilog-auto-wire): Pass the quiet flag to verilog-pretty-expr. (verilog-mode-version, verilog-mode-release-date): Update.
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