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author | Ng Zhi An <zhin@chromium.org> | 2021-10-13 08:05:30 -0700 |
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committer | GitHub <noreply@github.com> | 2021-10-13 08:05:30 -0700 |
commit | f64f393ff0bad3a33e97084ce63dcf18b13f335c (patch) | |
tree | d4746e7d11a9fdd53bd3b8ae049905f16e74e120 | |
parent | 97005b70bba94bf04db94c2b339bd268cd039130 (diff) | |
download | wabt-f64f393ff0bad3a33e97084ce63dcf18b13f335c.tar.gz wabt-f64f393ff0bad3a33e97084ce63dcf18b13f335c.tar.bz2 wabt-f64f393ff0bad3a33e97084ce63dcf18b13f335c.zip |
Handle some SIMD opcodes in opcodecnt (#1713)
Most of the SIMD instructions were already transparently handled, some
(like loadlane and v128.const) don't fit in the existing callbacks, so
we need to implement (and override) the default implementation.
-rw-r--r-- | src/binary-reader-opcnt.cc | 32 | ||||
-rw-r--r-- | src/binary-reader-opcnt.h | 2 | ||||
-rw-r--r-- | test/opcodecnt/immediates.txt | 37 |
3 files changed, 68 insertions, 3 deletions
diff --git a/src/binary-reader-opcnt.cc b/src/binary-reader-opcnt.cc index 3908660d..6f2d9318 100644 --- a/src/binary-reader-opcnt.cc +++ b/src/binary-reader-opcnt.cc @@ -113,11 +113,27 @@ void OpcodeInfo::Write(Stream& stream) { break; } + case Kind::V128: { + auto data = *GetData<v128>(); + auto l0 = data.u32(0); + auto l1 = data.u32(1); + auto l2 = data.u32(2); + auto l3 = data.u32(3); + stream.Writef(" %u %u %u %u (0x%x 0x%x 0x%x 0x%x)", l0, l1, l2, l3, l0, + l1, l2, l3); + break; + } + case Kind::Uint32Uint32: WriteArray<uint32_t>( stream, [&stream](uint32_t value) { stream.Writef("%u", value); }); break; + case Kind::Uint32Uint32Uint32: + WriteArray<uint32_t>( + stream, [&stream](uint32_t value) { stream.Writef("%u", value); }); + break; + case Kind::BlockSig: { auto type = *GetData<Type>(); if (type.IsIndex()) { @@ -191,9 +207,13 @@ class BinaryReaderOpcnt : public BinaryReaderNop { Result OnOpcodeUint32(uint32_t value) override; Result OnOpcodeIndex(Index value) override; Result OnOpcodeUint32Uint32(uint32_t value, uint32_t value2) override; + Result OnOpcodeUint32Uint32Uint32(uint32_t value, + uint32_t value2, + uint32_t value3) override; Result OnOpcodeUint64(uint64_t value) override; Result OnOpcodeF32(uint32_t value) override; Result OnOpcodeF64(uint64_t value) override; + Result OnOpcodeV128(v128 value) override; Result OnOpcodeBlockSig(Type sig_type) override; Result OnBrTableExpr(Index num_targets, Index* target_depths, @@ -246,6 +266,14 @@ Result BinaryReaderOpcnt::OnOpcodeUint32Uint32(uint32_t value0, return Emplace(current_opcode_, OpcodeInfo::Kind::Uint32Uint32, array, 2); } +Result BinaryReaderOpcnt::OnOpcodeUint32Uint32Uint32(uint32_t value0, + uint32_t value1, + uint32_t value2) { + uint32_t array[3] = {value0, value1, value2}; + return Emplace(current_opcode_, OpcodeInfo::Kind::Uint32Uint32Uint32, array, + 3); +} + Result BinaryReaderOpcnt::OnOpcodeUint64(uint64_t value) { return Emplace(current_opcode_, OpcodeInfo::Kind::Uint64, &value); } @@ -258,6 +286,10 @@ Result BinaryReaderOpcnt::OnOpcodeF64(uint64_t value) { return Emplace(current_opcode_, OpcodeInfo::Kind::Float64, &value); } +Result BinaryReaderOpcnt::OnOpcodeV128(v128 value) { + return Emplace(current_opcode_, OpcodeInfo::Kind::V128, &value); +} + Result BinaryReaderOpcnt::OnOpcodeBlockSig(Type sig_type) { return Emplace(current_opcode_, OpcodeInfo::Kind::BlockSig, &sig_type); } diff --git a/src/binary-reader-opcnt.h b/src/binary-reader-opcnt.h index cfdd570c..d7a947b0 100644 --- a/src/binary-reader-opcnt.h +++ b/src/binary-reader-opcnt.h @@ -39,8 +39,10 @@ class OpcodeInfo { Float32, Float64, Uint32Uint32, + Uint32Uint32Uint32, BlockSig, BrTable, + V128, }; explicit OpcodeInfo(Opcode, Kind); diff --git a/test/opcodecnt/immediates.txt b/test/opcodecnt/immediates.txt index af902e78..e7568145 100644 --- a/test/opcodecnt/immediates.txt +++ b/test/opcodecnt/immediates.txt @@ -7,10 +7,23 @@ i64.const 2 f32.const 3.125 f64.const 4.5 + v128.const i32x4 0 1 2 3 ;; load i32.const 0 i32.load offset=1 align=4 + i32.const 0 + v128.load offset=1 align=4 + i32.const 0 + v128.load8x8_s offset=1 align=4 + i32.const 0 + v128.load8_splat offset=1 align=1 + i32.const 0 + v128.const i32x4 0 1 2 3 + v128.load8_lane offset=3 2 + i32.const 0 + v128.const i32x4 0 1 2 3 + v128.store16_lane offset=3 2 ;; store i32.const 0 @@ -33,12 +46,17 @@ i32.const 0 br_table 0 0 0 0 0 0 + ;; simd extract/replace lane + v128.const i32x4 0 1 2 3 + i32x4.extract_lane 3 + return)) (;; STDOUT ;;; -Total opcodes: 19 +Total opcodes: 34 Opcode counts: -i32.const: 5 +i32.const: 10 +v128.const: 4 end: 3 block: 2 unreachable: 1 @@ -50,9 +68,16 @@ i32.store: 1 i64.const: 1 f32.const: 1 f64.const: 1 +v128.load: 1 +v128.load8x8_s: 1 +v128.load8_splat: 1 +i32x4.extract_lane: 1 +v128.load8_lane: 1 +v128.store16_lane: 1 Opcode counts with immediates: -i32.const 0 (0x0): 4 +i32.const 0 (0x0): 9 +v128.const 0 1 2 3 (0x0 0x1 0x2 0x3): 4 end: 3 unreachable: 1 block: 1 @@ -66,4 +91,10 @@ i32.const 1 (0x1): 1 i64.const 2 (0x2): 1 f32.const 3.125 (0x1.9p+1): 1 f64.const 4.5 (0x1.2p+2): 1 +v128.load 2, 1: 1 +v128.load8x8_s 2, 1: 1 +v128.load8_splat 0, 1: 1 +i32x4.extract_lane 3 (0x3): 1 +v128.load8_lane 0, 3, 2: 1 +v128.store16_lane 1, 3, 2: 1 ;;; STDOUT ;;) |