[simd] Implement load lane (#1646)

This is a new kind of ir/ast node/instruction. It has 3 immediates:
memarg align, memarg offset, and lane index. This required new visitor
functions in all the places.

Drive-by cleanup to share the simd lane parsing logic between shuffle,
lane op and this new load lane instructions. This requires rebasing some
tests because the error messages are slightly different now.

1 files changed, 12 insertions, 0 deletions

diff --git a/src/binary-reader-ir.cc b/src/binary-reader-ir.cc
index 71bc3f9a..9f123799 100644
--- a/src/binary-reader-ir.cc
+++ b/src/binary-reader-ir.cc
@@ -202,6 +202,10 @@ class BinaryReaderIR : public BinaryReaderNop {
   Result OnUnwindExpr() override;
   Result EndFunctionBody(Index index) override;
   Result OnSimdLaneOpExpr(Opcode opcode, uint64_t value) override;
+  Result OnSimdLoadLaneExpr(Opcode opcode,
+                            Address alignment_log2,
+                            Address offset,
+                            uint64_t value) override;
   Result OnSimdShuffleOpExpr(Opcode opcode, v128 value) override;
   Result OnLoadSplatExpr(Opcode opcode,
                          Address alignment_log2,
@@ -1081,6 +1085,14 @@ Result BinaryReaderIR::OnSimdLaneOpExpr(Opcode opcode, uint64_t value) {
   return AppendExpr(MakeUnique<SimdLaneOpExpr>(opcode, value));
 }
 
+Result BinaryReaderIR::OnSimdLoadLaneExpr(Opcode opcode,
+                                          Address alignment_log2,
+                                          Address offset,
+                                          uint64_t value) {
+  return AppendExpr(
+      MakeUnique<SimdLoadLaneExpr>(opcode, alignment_log2, offset, value));
+}
+
 Result BinaryReaderIR::OnSimdShuffleOpExpr(Opcode opcode, v128 value) {
   return AppendExpr(MakeUnique<SimdShuffleOpExpr>(opcode, value));
 }