summaryrefslogtreecommitdiff
path: root/src/interp/interp.cc
diff options
context:
space:
mode:
authorNg Zhi An <ngzhian@gmail.com>2021-03-17 09:17:00 -0700
committerGitHub <noreply@github.com>2021-03-17 09:17:00 -0700
commitc7293e42c587cab2b15eaf2934f574f84eeab9e5 (patch)
treea800fdcee60af3effba7ee2c9e316b15f9c9a9b1 /src/interp/interp.cc
parenta24ae3eed05f28d91a48dac2591619dd204e4526 (diff)
downloadwabt-c7293e42c587cab2b15eaf2934f574f84eeab9e5.tar.gz
wabt-c7293e42c587cab2b15eaf2934f574f84eeab9e5.tar.bz2
wabt-c7293e42c587cab2b15eaf2934f574f84eeab9e5.zip
[simd] Implement v128.load{32,64}_zero (#1644)
This requires a new ir type, and the relevant implementation of virtual mthods in the various visitors.
Diffstat (limited to 'src/interp/interp.cc')
-rw-r--r--src/interp/interp.cc17
1 files changed, 17 insertions, 0 deletions
diff --git a/src/interp/interp.cc b/src/interp/interp.cc
index a8730880..6538a341 100644
--- a/src/interp/interp.cc
+++ b/src/interp/interp.cc
@@ -1636,6 +1636,9 @@ RunResult Thread::StepInternal(Trap::Ptr* out_trap) {
case O::V128Load32Splat: return DoSimdLoadSplat<u32x4, u32>(instr, out_trap);
case O::V128Load64Splat: return DoSimdLoadSplat<u64x2, u64>(instr, out_trap);
+ case O::V128Load32Zero: return DoSimdLoadZero<u32x4, u32>(instr, out_trap);
+ case O::V128Load64Zero: return DoSimdLoadZero<u64x2, u64>(instr, out_trap);
+
case O::I8X16NarrowI16X8S: return DoSimdNarrow<s8x16, s16x8>();
case O::I8X16NarrowI16X8U: return DoSimdNarrow<u8x16, s16x8>();
case O::I16X8NarrowI32X4S: return DoSimdNarrow<s16x8, s32x4>();
@@ -2162,6 +2165,20 @@ RunResult Thread::DoSimdLoadSplat(Instr instr, Trap::Ptr* out_trap) {
return RunResult::Ok;
}
+template <typename S, typename T>
+RunResult Thread::DoSimdLoadZero(Instr instr, Trap::Ptr* out_trap) {
+ using L = typename S::LaneType;
+ L val;
+ if (Load<L>(instr, &val, out_trap) != RunResult::Ok) {
+ return RunResult::Trap;
+ }
+ S result;
+ std::fill(std::begin(result.v), std::end(result.v), 0);
+ result[0] = val;
+ Push(result);
+ return RunResult::Ok;
+}
+
RunResult Thread::DoSimdSwizzle() {
using S = u8x16;
auto rhs = Pop<S>();