[simd] Rename any_true, implement i64x2 bitmask and all_true (#1624)

* Rename all any_true to v128.any_true

* Add i64x2.bitmask and i64x2.all_true, rebase simd_boolean

* Unskip spec/simd/simd_i16x8_arith2.txt since i64x2.abs is now implemented

* Unskip spec/simd/simd_lane.txt

* Update dump interp tests, rebase

2 files changed, 6 insertions, 6 deletions

diff --git a/src/interp/interp.cc b/src/interp/interp.cc
index 5988be1e..0949c7b2 100644
--- a/src/interp/interp.cc
+++ b/src/interp/interp.cc
@@ -1516,9 +1516,9 @@ RunResult Thread::StepInternal(Trap::Ptr* out_trap) {
     case O::V128Or:        return DoSimdBinop(IntOr<u64>);
     case O::V128Xor:       return DoSimdBinop(IntXor<u64>);
     case O::V128BitSelect: return DoSimdBitSelect();
+    case O::V128AnyTrue:      return DoSimdIsTrue<u8x16, 1>();
 
     case O::I8X16Neg:          return DoSimdUnop(IntNeg<u8>);
-    case O::I8X16AnyTrue:      return DoSimdIsTrue<u8x16, 1>();
     case O::I8X16Bitmask:      return DoSimdBitmask<s8x16>();
     case O::I8X16AllTrue:      return DoSimdIsTrue<u8x16, 16>();
     case O::I8X16Shl:          return DoSimdShift(IntShl<u8>);
@@ -1536,7 +1536,6 @@ RunResult Thread::StepInternal(Trap::Ptr* out_trap) {
     case O::I8X16MaxU:         return DoSimdBinop(IntMax<u8>);
 
     case O::I16X8Neg:          return DoSimdUnop(IntNeg<u16>);
-    case O::I16X8AnyTrue:      return DoSimdIsTrue<u16x8, 1>();
     case O::I16X8Bitmask:      return DoSimdBitmask<s16x8>();
     case O::I16X8AllTrue:      return DoSimdIsTrue<u16x8, 8>();
     case O::I16X8Shl:          return DoSimdShift(IntShl<u16>);
@@ -1555,7 +1554,6 @@ RunResult Thread::StepInternal(Trap::Ptr* out_trap) {
     case O::I16X8MaxU:         return DoSimdBinop(IntMax<u16>);
 
     case O::I32X4Neg:          return DoSimdUnop(IntNeg<u32>);
-    case O::I32X4AnyTrue:      return DoSimdIsTrue<u32x4, 1>();
     case O::I32X4Bitmask:      return DoSimdBitmask<s32x4>();
     case O::I32X4AllTrue:      return DoSimdIsTrue<u32x4, 4>();
     case O::I32X4Shl:          return DoSimdShift(IntShl<u32>);
@@ -1570,6 +1568,8 @@ RunResult Thread::StepInternal(Trap::Ptr* out_trap) {
     case O::I32X4MaxU:         return DoSimdBinop(IntMax<u32>);
 
     case O::I64X2Neg:          return DoSimdUnop(IntNeg<u64>);
+    case O::I64X2Bitmask:      return DoSimdBitmask<s64x2>();
+    case O::I64X2AllTrue:      return DoSimdIsTrue<u64x2, 2>();
     case O::I64X2Shl:          return DoSimdShift(IntShl<u64>);
     case O::I64X2ShrS:         return DoSimdShift(IntShr<s64>);
     case O::I64X2ShrU:         return DoSimdShift(IntShr<u64>);
diff --git a/src/interp/istream.cc b/src/interp/istream.cc
index 6e956675..462eb4a5 100644
--- a/src/interp/istream.cc
+++ b/src/interp/istream.cc
@@ -161,7 +161,6 @@ Instr Istream::Read(Offset* offset) const {
     case Opcode::F64X2Sqrt:
     case Opcode::F64X2Trunc:
     case Opcode::I16X8AllTrue:
-    case Opcode::I16X8AnyTrue:
     case Opcode::I16X8Bitmask:
     case Opcode::I16X8Neg:
     case Opcode::I16X8Splat:
@@ -186,7 +185,6 @@ Instr Istream::Read(Offset* offset) const {
     case Opcode::I32TruncSatF64U:
     case Opcode::I32WrapI64:
     case Opcode::I32X4AllTrue:
-    case Opcode::I32X4AnyTrue:
     case Opcode::I32X4Bitmask:
     case Opcode::I32X4Neg:
     case Opcode::I32X4Splat:
@@ -215,14 +213,16 @@ Instr Istream::Read(Offset* offset) const {
     case Opcode::I64TruncSatF64S:
     case Opcode::I64TruncSatF64U:
     case Opcode::I64X2Neg:
+    case Opcode::I64X2AllTrue:
+    case Opcode::I64X2Bitmask:
     case Opcode::I64X2Splat:
     case Opcode::I8X16AllTrue:
-    case Opcode::I8X16AnyTrue:
     case Opcode::I8X16Bitmask:
     case Opcode::I8X16Neg:
     case Opcode::I8X16Splat:
     case Opcode::RefIsNull:
     case Opcode::V128Not:
+    case Opcode::V128AnyTrue:
     case Opcode::I8X16Abs:
     case Opcode::I16X8Abs:
     case Opcode::I32X4Abs: