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| author | Soni L <EnderMoneyMod@gmail.com> | 2023-11-14 22:25:41 -0300 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-11-14 17:25:41 -0800 |
| commit | 21e73b7e6eee4addbc84ae265ee2f5ca88178934 (patch) | |
| tree | a6ea97dbf70a173e7f5667487ca0e4a64a8b97f5 /src/template/wasm2c_atomicops.declarations.c | |
| parent | a0bc02eacae79763d35360673620ab38d527f68a (diff) | |
| download | wabt-21e73b7e6eee4addbc84ae265ee2f5ca88178934.tar.gz wabt-21e73b7e6eee4addbc84ae265ee2f5ca88178934.tar.bz2 wabt-21e73b7e6eee4addbc84ae265ee2f5ca88178934.zip | |
wasm2c: Improve address abstraction for BE support (#2328)
Diffstat (limited to 'src/template/wasm2c_atomicops.declarations.c')
| -rw-r--r-- | src/template/wasm2c_atomicops.declarations.c | 55 |
1 files changed, 28 insertions, 27 deletions
diff --git a/src/template/wasm2c_atomicops.declarations.c b/src/template/wasm2c_atomicops.declarations.c index 78d9772e..976f7f95 100644 --- a/src/template/wasm2c_atomicops.declarations.c +++ b/src/template/wasm2c_atomicops.declarations.c @@ -125,15 +125,15 @@ TRAP(UNALIGNED); \ } -#define DEFINE_ATOMIC_LOAD(name, t1, t2, t3, force_read) \ - static inline t3 name(wasm_rt_memory_t* mem, u64 addr) { \ - MEMCHECK(mem, addr, t1); \ - ATOMIC_ALIGNMENT_CHECK(addr, t1); \ - t1 result; \ - wasm_rt_memcpy(&result, &mem->data[addr], sizeof(t1)); \ - result = atomic_load_##t1(&mem->data[addr]); \ - force_read(result); \ - return (t3)(t2)result; \ +#define DEFINE_ATOMIC_LOAD(name, t1, t2, t3, force_read) \ + static inline t3 name(wasm_rt_memory_t* mem, u64 addr) { \ + MEMCHECK(mem, addr, t1); \ + ATOMIC_ALIGNMENT_CHECK(addr, t1); \ + t1 result; \ + wasm_rt_memcpy(&result, MEM_ADDR(mem, addr, sizeof(t1)), sizeof(t1)); \ + result = atomic_load_##t1(MEM_ADDR(mem, addr, sizeof(t1))); \ + force_read(result); \ + return (t3)(t2)result; \ } DEFINE_ATOMIC_LOAD(i32_atomic_load, u32, u32, u32, FORCE_READ_INT) @@ -149,7 +149,7 @@ DEFINE_ATOMIC_LOAD(i64_atomic_load32_u, u32, u64, u64, FORCE_READ_INT) MEMCHECK(mem, addr, t1); \ ATOMIC_ALIGNMENT_CHECK(addr, t1); \ t1 wrapped = (t1)value; \ - atomic_store_##t1(&mem->data[addr], wrapped); \ + atomic_store_##t1(MEM_ADDR(mem, addr, sizeof(t1)), wrapped); \ } DEFINE_ATOMIC_STORE(i32_atomic_store, u32, u32) @@ -160,13 +160,13 @@ DEFINE_ATOMIC_STORE(i64_atomic_store8, u8, u64) DEFINE_ATOMIC_STORE(i64_atomic_store16, u16, u64) DEFINE_ATOMIC_STORE(i64_atomic_store32, u32, u64) -#define DEFINE_ATOMIC_RMW(name, op, t1, t2) \ - static inline t2 name(wasm_rt_memory_t* mem, u64 addr, t2 value) { \ - MEMCHECK(mem, addr, t1); \ - ATOMIC_ALIGNMENT_CHECK(addr, t1); \ - t1 wrapped = (t1)value; \ - t1 ret = atomic_##op##_##t1(&mem->data[addr], wrapped); \ - return (t2)ret; \ +#define DEFINE_ATOMIC_RMW(name, op, t1, t2) \ + static inline t2 name(wasm_rt_memory_t* mem, u64 addr, t2 value) { \ + MEMCHECK(mem, addr, t1); \ + ATOMIC_ALIGNMENT_CHECK(addr, t1); \ + t1 wrapped = (t1)value; \ + t1 ret = atomic_##op##_##t1(MEM_ADDR(mem, addr, sizeof(t1)), wrapped); \ + return (t2)ret; \ } DEFINE_ATOMIC_RMW(i32_atomic_rmw8_add_u, add, u8, u32) @@ -217,16 +217,17 @@ DEFINE_ATOMIC_RMW(i64_atomic_rmw16_xchg_u, exchange, u16, u64) DEFINE_ATOMIC_RMW(i64_atomic_rmw32_xchg_u, exchange, u32, u64) DEFINE_ATOMIC_RMW(i64_atomic_rmw_xchg, exchange, u64, u64) -#define DEFINE_ATOMIC_CMP_XCHG(name, t1, t2) \ - static inline t1 name(wasm_rt_memory_t* mem, u64 addr, t1 expected, \ - t1 replacement) { \ - MEMCHECK(mem, addr, t2); \ - ATOMIC_ALIGNMENT_CHECK(addr, t2); \ - t2 expected_wrapped = (t2)expected; \ - t2 replacement_wrapped = (t2)replacement; \ - t2 old = atomic_compare_exchange_##t2(&mem->data[addr], &expected_wrapped, \ - replacement_wrapped); \ - return (t1)old; \ +#define DEFINE_ATOMIC_CMP_XCHG(name, t1, t2) \ + static inline t1 name(wasm_rt_memory_t* mem, u64 addr, t1 expected, \ + t1 replacement) { \ + MEMCHECK(mem, addr, t2); \ + ATOMIC_ALIGNMENT_CHECK(addr, t2); \ + t2 expected_wrapped = (t2)expected; \ + t2 replacement_wrapped = (t2)replacement; \ + t2 old = \ + atomic_compare_exchange_##t2(MEM_ADDR(mem, addr, sizeof(t2)), \ + &expected_wrapped, replacement_wrapped); \ + return (t1)old; \ } DEFINE_ATOMIC_CMP_XCHG(i32_atomic_rmw8_cmpxchg_u, u32, u8); |