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authorNg Zhi An <zhin@chromium.org>2021-08-05 15:13:53 -0700
committerGitHub <noreply@github.com>2021-08-05 22:13:53 +0000
commitafd5a5e8eb3bb315c7a50e22617c5529ba400c8c (patch)
tree386becd786d90fd6a0503c7927691d2dbf0c3798 /src
parent499f25a4206f8c849ded5908404abdf282cc3826 (diff)
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[simd] Fix load/store lanes on BE systems (#1697)
The use of `.v` is incorrect, we should simply use array subscript operator on the Simd type, which takes care of BE systems. For #1670. (Not using fix as I don't have a BE system to verify.)
Diffstat (limited to 'src')
-rw-r--r--src/interp/interp.cc4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/interp/interp.cc b/src/interp/interp.cc
index 67082980..09bf8bf3 100644
--- a/src/interp/interp.cc
+++ b/src/interp/interp.cc
@@ -2186,7 +2186,7 @@ RunResult Thread::DoSimdLoadLane(Instr instr, Trap::Ptr* out_trap) {
if (Load<T>(instr, &val, out_trap) != RunResult::Ok) {
return RunResult::Trap;
}
- result.v[instr.imm_u32x2_u8.idx] = val;
+ result[instr.imm_u32x2_u8.idx] = val;
Push(result);
return RunResult::Ok;
}
@@ -2196,7 +2196,7 @@ RunResult Thread::DoSimdStoreLane(Instr instr, Trap::Ptr* out_trap) {
using T = typename S::LaneType;
Memory::Ptr memory{store_, inst_->memories()[instr.imm_u32x2_u8.fst]};
auto result = Pop<S>();
- T val = result.v[instr.imm_u32x2_u8.idx];
+ T val = result[instr.imm_u32x2_u8.idx];
u64 offset = PopPtr(memory);
TRAP_IF(Failed(memory->Store(offset, instr.imm_u32x2_u8.snd, val)),
StringPrintf("out of bounds memory access: access at %" PRIu64