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| author | gnzlbg <gnzlbg@users.noreply.github.com> | 2019-03-07 11:47:04 +0100 |
|---|---|---|
| committer | Ben Smith <binjimin@gmail.com> | 2019-03-07 02:47:04 -0800 |
| commit | a44ee1228e2a1408ae773dfeb2dfc0463b371ea2 (patch) | |
| tree | a027807c209dac69d2f8a02e7e05f227467913ed /test/interp | |
| parent | 2d1f2c9d5a544181f5a7bc5598831323ffa223c7 (diff) | |
| download | wabt-a44ee1228e2a1408ae773dfeb2dfc0463b371ea2.tar.gz wabt-a44ee1228e2a1408ae773dfeb2dfc0463b371ea2.tar.bz2 wabt-a44ee1228e2a1408ae773dfeb2dfc0463b371ea2.zip | |
Update textual encoding of SIMD vector shuffle to conform to the latest SIMD draft (#1034)
Diffstat (limited to 'test/interp')
| -rw-r--r-- | test/interp/logging-all-opcodes.txt | 8 | ||||
| -rw-r--r-- | test/interp/simd-lane.txt | 2 | ||||
| -rw-r--r-- | test/interp/tracing-all-opcodes.txt | 4 |
3 files changed, 7 insertions, 7 deletions
diff --git a/test/interp/logging-all-opcodes.txt b/test/interp/logging-all-opcodes.txt index 5ddbeba5..7fd0d5bb 100644 --- a/test/interp/logging-all-opcodes.txt +++ b/test/interp/logging-all-opcodes.txt @@ -222,7 +222,7 @@ (; 0xfd 0x00 ;) (func (export "v128.load") i32.const 1 v128.load offset=3 drop) (; 0xfd 0x01 ;) (func (export "v128.store") i32.const 1 v128.const i32 1 1 1 1 v128.store offset=3) (; 0xfd 0x02 ;) (func (export "v128.const") v128.const i32 1 1 1 1 drop) - (; 0xfd 0x03 ;) (func (export "v8x16.shuffle") v128.const i32 1 1 1 1 v128.const i32 2 2 2 2 v8x16.shuffle 1 1 1 1 drop) + (; 0xfd 0x03 ;) (func (export "v8x16.shuffle") v128.const i32 1 1 1 1 v128.const i32 2 2 2 2 v8x16.shuffle 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 drop) (; 0xfd 0x04 ;) (func (export "i8x16.splat") i32.const 1 i8x16.splat drop) (; 0xfd 0x05 ;) (func (export "i8x16.extract_lane_s") v128.const i32 1 1 1 1 i8x16.extract_lane_s 15 drop) (; 0xfd 0x06 ;) (func (export "i8x16.extract_lane_u") v128.const i32 1 1 1 1 i8x16.extract_lane_u 15 drop) @@ -4514,7 +4514,7 @@ 000224f: 0200 0000 0200 0000 0200 0000 0200 0000 ; v128 literal 000225f: fd ; prefix 0002260: 03 ; v8x16.shuffle -0002261: 0100 0000 0100 0000 0100 0000 0100 0000 ; Simd Lane[16] literal +0002261: 0101 0101 0101 0101 0101 0101 0101 0101 ; Simd Lane[16] literal 0002271: 1a ; drop 0002272: 0b ; end 0002239: 39 ; FIXUP func body size @@ -9234,7 +9234,7 @@ BeginModule(version: 1) OnLocalDeclCount(0) OnV128ConstExpr(0x00000001 0x00000001 0x00000001 0x00000001) OnV128ConstExpr(0x00000002 0x00000002 0x00000002 0x00000002) - OnSimdShuffleOpExpr (lane: 0x00000001 00000001 00000001 00000001) + OnSimdShuffleOpExpr (lane: 0x01010101 01010101 01010101 01010101) OnDropExpr EndFunctionBody(190) BeginFunctionBody(191, size:7) @@ -11426,7 +11426,7 @@ EndModule 5144| return 5148| v128.const 0x00000001 0x00000001 0x00000001 0x00000001 5168| v128.const 0x00000002 0x00000002 0x00000002 0x00000002 -5188| v8x16.shuffle %[-2], %[-1] : (Lane imm: $0x00000001 0x00000001 0x00000001 0x00000001 ) +5188| v8x16.shuffle %[-2], %[-1] : (Lane imm: $0x01010101 0x01010101 0x01010101 0x01010101 ) 5208| drop 5212| return 5216| i32.const 1 diff --git a/test/interp/simd-lane.txt b/test/interp/simd-lane.txt index 7e3aa86b..8065a1b3 100644 --- a/test/interp/simd-lane.txt +++ b/test/interp/simd-lane.txt @@ -85,7 +85,7 @@ (func (export "func_v8x16_shuffle_0") (result v128) v128.const i32 0xff00ff01 0xff00ff0f 0xff00ffff 0xff00ff7f v128.const i32 0x00550055 0x00550055 0x00550055 0x00550155 - v8x16.shuffle 0x03120110 0x07160514 0x0b1a0918 0x0f1e0d1c) + v8x16.shuffle 16 1 18 3 20 5 22 7 24 9 26 11 28 13 30 15) ) (;; STDOUT ;;; func_i8x16_extract_lane_s_0() => i32:4294967295 diff --git a/test/interp/tracing-all-opcodes.txt b/test/interp/tracing-all-opcodes.txt index 22956945..ac28e68c 100644 --- a/test/interp/tracing-all-opcodes.txt +++ b/test/interp/tracing-all-opcodes.txt @@ -222,7 +222,7 @@ (; 0xfd 0x00 ;) (func (export "v128.load") i32.const 1 v128.load offset=3 drop) (; 0xfd 0x01 ;) (func (export "v128.store") i32.const 1 v128.const i32 1 1 1 1 v128.store offset=3) (; 0xfd 0x02 ;) (func (export "v128.const") v128.const i32 1 1 1 1 drop) - (; 0xfd 0x03 ;) (func (export "v8x16.shuffle") v128.const i32 1 1 1 1 v128.const i32 2 2 2 2 v8x16.shuffle 1 1 1 1 drop) + (; 0xfd 0x03 ;) (func (export "v8x16.shuffle") v128.const i32 1 1 1 1 v128.const i32 2 2 2 2 v8x16.shuffle 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 drop) (; 0xfd 0x04 ;) (func (export "i8x16.splat") i32.const 1 i8x16.splat drop) (; 0xfd 0x05 ;) (func (export "i8x16.extract_lane_s") v128.const i32 1 1 1 1 i8x16.extract_lane_s 15 drop) (; 0xfd 0x06 ;) (func (export "i8x16.extract_lane_u") v128.const i32 1 1 1 1 i8x16.extract_lane_u 15 drop) @@ -1616,7 +1616,7 @@ v128.const() => >>> running export "v8x16.shuffle": #0. 5104: V:0 | v128.const 0x00000001 0x00000001 0x00000001 0x00000001 #0. 5124: V:1 | v128.const 0x00000002 0x00000002 0x00000002 0x00000002 -#0. 5144: V:2 | v8x16.shuffle $0x00000001 00000001 00000001 00000001 $0x00000002 00000002 00000002 00000002 : with lane imm: $0x00000001 00000001 00000001 00000001 +#0. 5144: V:2 | v8x16.shuffle $0x00000001 00000001 00000001 00000001 $0x00000002 00000002 00000002 00000002 : with lane imm: $0x01010101 01010101 01010101 01010101 #0. 5164: V:1 | drop #0. 5168: V:0 | return v8x16.shuffle() => |