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* SIMD is now phase 5, enable it by default
* Update test flags, rebase test, and docs
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4 double precision conversion instructions are implemented:
- f32x4.demote_f64x2_zero
- f64x2.demote_low_f32x4
- f64x2.convert_low_i32x4_s
- f64x2.convert_low_i32x4_u
This is now sufficient to unskip simd_conversions.txt.
Rebase a bunch of tests due to the rename from widen to extend.
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* Update testsuite
* Update test results
* Disallow lane nums with optional + for simd ops
* Update simd support
* Mark `test/spec/func.txt` as failing
Co-authored-by: Darin Morrison <darinmorrison@users.noreply.github.com>
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* Fix typo in I8X16AvgrU
* Update tests
* Skip simd_const test till it is updated
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* Add i64x2.mul
* Add i{8x16,16x8,32x4}.{min,max}_{s,u}
* Rename i{8x16,16x8,32x4,64x2}.load_splat -> v{8x16,16x8,32x4,64x2}.load_splat
* Remove i8x16.mul
* Remove f64x2.convert_i64x2_{s,u}
* Remove i64x2.trunc_sat_f64x2_{s,u}
* Remove i64x2.{any,all}_true
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Some further testing revealed another typo I believe from #1303 in some
of the widening instructions, I think this is the last one though!
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* i{16x8,32x4,64x2}.load{8x8,16x4,32x2}_{s,u}
* v128.andnot
* i{8x16,16x8}.avgr_u
None are implemented in the interpreter yet.
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* i{8x16,16x8}.narrow_i{16x8,32x4}_{s,u}
* i{16x8,32x4}.widen_{low,high}_i{8x16,16x8}_{s,u}
(though not all combinations are valid)
These are not currently supported in the interpreter.
TODO: Implement other new SIMD instructions too: load and extend,
bitwise and-not, lanewise rounding average
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* Update v128.const WAT parsing to conform to the SIMD draft
* manually fix indentation
* rename no_lanes to lane_count
* Fix parsing of OOB integers
* Update simd shuffle tests to new syntax
* Add the v128.const type tokens to the lexer.
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Since names are not always unique.
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This is useful for finding large functions with wasm-objdump.
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Some instructions have very long encodings (longer than 9 bytes). For
those instructions, it is nice to write out all the bytes for that
instruction and their immediates. This used to be truncated, and
misaligned:
```
0002f1: fd 02 01 00 00 00 02 00 00 00 03 | v128.const 0x00000001 0x00000002 0x00000003 0x00000004
```
Now it is wrapped:
```
0002f0: fd 02 01 00 00 00 02 00 00 | v128.const 0x00000001 0x00000002 0x00000003 0x00000004
0002f9: 00 03 00 00 00 04 00 00 00 |
```
The instruction offset was also incorrect before for instructions with
a prefix, and is now fixed.
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Tests shamelessly borrowed with light editing from test/interp.
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