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* SIMD is now phase 5, enable it by default (#1712)Ng Zhi An2021-09-201-1/+0
| | | | | * SIMD is now phase 5, enable it by default * Update test flags, rebase test, and docs
* Make v128.const i32x4 op conform to the SIMD draft (#1037)gnzlbg2019-03-281-162/+162
| | | | | | | | | | | | | | * Update v128.const WAT parsing to conform to the SIMD draft * manually fix indentation * rename no_lanes to lane_count * Fix parsing of OOB integers * Update simd shuffle tests to new syntax * Add the v128.const type tokens to the lexer.
* Make lane-wise SIMD relational operator conform to the spec (#1031)gnzlbg2019-03-051-45/+45
| | | | | The lane-wise SIMD relational operators where setting false lanes to zero and true lanes to 1, but according to the spec these operators clear all bits of false lanes, and set all bits of true ones.
* SIMD Comparison Greater than or equal instructions implementation. (#778)lizhengxing2018-02-281-0/+62
| | | | | | | | Including: i8x16.ge_s, i8x16_ge_u i16x8.ge_s, i16x8_ge_u i32x4.ge_s, i32x4_ge_u f32x4.ge f64x2.ge
* SIMD Comparison Greater than instructions implementation. (#772)lizhengxing2018-02-271-0/+62
| | | | | | | | Including: i8x16.gt_s, i8x16_gt_u i16x8.gt_s, i16x8_gt_u i32x4.gt_s, i32x4_gt_u f32x4.gt f64x2.gt
* SIMD Comparison Less than or equal instructions implementation. (#771)lizhengxing2018-02-261-0/+62
| | | | | | | | Including: i8x16.le_s, i8x16_le_u i16x8.le_s, i16x8_le_u i32x4.le_s, i32x4_le_u f32x4.le f64x2.le
* SIMD Comparison Less than instructions implementation. (#770)lizhengxing2018-02-231-0/+62
| | | | | | | | Including: i8x16.lt_s, i8x16_lt_u i16x8.lt_s, i16x8_lt_u i32x4.lt_s, i32x4_lt_u f32x4.lt f64x2.lt
* SIMD Comparison Non-Equality instructions implementation. (#767)lizhengxing2018-02-211-0/+62
| | | | Including: (i8x16/i16x8/i32x4/f32x4/f64x2).ne
* SIMD Comparison Equality instructions implementation. (#766)lizhengxing2018-02-211-0/+67
Including: (i8x16/i16x8/i32x4/f32x4/f64x2).eq