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| author | Daniel Wirtz <dcode@dcode.io> | 2021-04-08 23:50:51 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2021-04-08 23:50:51 +0200 |
| commit | 0efebfe68cb0e2759b88093e1811d034ef3e8a79 (patch) | |
| tree | a676971fc2f671ea6817b2e218ef440d7847a827 /scripts | |
| parent | 6921dd30dc82b3df2511def7c941f4a1a9aeeec2 (diff) | |
| download | binaryen-0efebfe68cb0e2759b88093e1811d034ef3e8a79.tar.gz binaryen-0efebfe68cb0e2759b88093e1811d034ef3e8a79.tar.bz2 binaryen-0efebfe68cb0e2759b88093e1811d034ef3e8a79.zip | |
Add v128.load/storeN_lane SIMD instructions to C/JS API (#3784)
Adds C/JS APIs for the SIMD instructions
* Load8LaneVec128 (was LoadLaneVec8x16)
* Load16LaneVec128 (was LoadLaneVec16x8)
* Load32LaneVec128 (was LoadLaneVec32x4)
* Load64LaneVec128 (was LoadLaneVec64x2)
* Store8LaneVec128 (was StoreLaneVec8x16)
* Store16LaneVec128 (was StoreLaneVec16x8)
* Store32LaneVec128 (was StoreLaneVec32x4)
* Store64LaneVec128 (was StoreLaneVec64x2)
Diffstat (limited to 'scripts')
| -rwxr-xr-x | scripts/gen-s-parser.py | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/scripts/gen-s-parser.py b/scripts/gen-s-parser.py index 569289427..f9f13b355 100755 --- a/scripts/gen-s-parser.py +++ b/scripts/gen-s-parser.py @@ -357,14 +357,14 @@ instructions = [ ("v128.andnot", "makeBinary(s, BinaryOp::AndNotVec128)"), ("v128.any_true", "makeUnary(s, UnaryOp::AnyTrueVec128)"), ("v128.bitselect", "makeSIMDTernary(s, SIMDTernaryOp::Bitselect)"), - ("v128.load8_lane", "makeSIMDLoadStoreLane(s, LoadLaneVec8x16)"), - ("v128.load16_lane", "makeSIMDLoadStoreLane(s, LoadLaneVec16x8)"), - ("v128.load32_lane", "makeSIMDLoadStoreLane(s, LoadLaneVec32x4)"), - ("v128.load64_lane", "makeSIMDLoadStoreLane(s, LoadLaneVec64x2)"), - ("v128.store8_lane", "makeSIMDLoadStoreLane(s, StoreLaneVec8x16)"), - ("v128.store16_lane", "makeSIMDLoadStoreLane(s, StoreLaneVec16x8)"), - ("v128.store32_lane", "makeSIMDLoadStoreLane(s, StoreLaneVec32x4)"), - ("v128.store64_lane", "makeSIMDLoadStoreLane(s, StoreLaneVec64x2)"), + ("v128.load8_lane", "makeSIMDLoadStoreLane(s, SIMDLoadStoreLaneOp::Load8LaneVec128)"), + ("v128.load16_lane", "makeSIMDLoadStoreLane(s, SIMDLoadStoreLaneOp::Load16LaneVec128)"), + ("v128.load32_lane", "makeSIMDLoadStoreLane(s, SIMDLoadStoreLaneOp::Load32LaneVec128)"), + ("v128.load64_lane", "makeSIMDLoadStoreLane(s, SIMDLoadStoreLaneOp::Load64LaneVec128)"), + ("v128.store8_lane", "makeSIMDLoadStoreLane(s, SIMDLoadStoreLaneOp::Store8LaneVec128)"), + ("v128.store16_lane", "makeSIMDLoadStoreLane(s, SIMDLoadStoreLaneOp::Store16LaneVec128)"), + ("v128.store32_lane", "makeSIMDLoadStoreLane(s, SIMDLoadStoreLaneOp::Store32LaneVec128)"), + ("v128.store64_lane", "makeSIMDLoadStoreLane(s, SIMDLoadStoreLaneOp::Store64LaneVec128)"), ("i8x16.popcnt", "makeUnary(s, UnaryOp::PopcntVecI8x16)"), ("i8x16.abs", "makeUnary(s, UnaryOp::AbsVecI8x16)"), ("i8x16.neg", "makeUnary(s, UnaryOp::NegVecI8x16)"), |