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* [Wasm GC] rtt.fresh_sub (#3936)Alon Zakai2021-06-171-0/+1
* [Wasm GC] Add negated BrOn* operations (#3913)Alon Zakai2021-06-021-0/+5
* [Wasm GC] Add experimental array.copy (#3911)Alon Zakai2021-05-271-0/+1
* Rename SIMD extending load instructions (#3798)Daniel Wirtz2021-04-121-6/+6
* Rename various SIMD load instructions (#3795)Daniel Wirtz2021-04-111-6/+6
* Add v128.load/storeN_lane SIMD instructions to C/JS API (#3784)Daniel Wirtz2021-04-081-8/+8
* Update SIMD names and opcodes (#3771)Thomas Lively2021-04-051-55/+42
* Prototype i32x4.widen_i8x16_{s,u} (#3535)Thomas Lively2021-02-011-0/+2
* [GC] br_on_null (#3528)Alon Zakai2021-02-011-0/+1
* [GC] ref.as_non_null (#3527)Alon Zakai2021-01-281-0/+1
* [GC] Add br_on_func/data/i31 (#3525)Alon Zakai2021-01-281-1/+4
* [GC] ref.as_* (#3520)Alon Zakai2021-01-271-0/+3
* [GC] ref.is_func/data/i31 (#3519)Alon Zakai2021-01-261-2/+5
* [GC] RefIsNull => RefIs. (#3516)Alon Zakai2021-01-261-1/+1
* Remove exnref and br_on_exn (#3505)Heejin Ahn2021-01-221-1/+0
* Prototype additional f64x2 conversions (#3501)Thomas Lively2021-01-191-0/+7
* Prototype prefetch instructions (#3467)Thomas Lively2021-01-061-0/+3
* Prototype SIMD extending pairwise add instructions (#3466)Thomas Lively2021-01-051-2/+4
* Prototype SIMD instructions implemented in LLVM (#3440)Thomas Lively2020-12-111-0/+10
* [TypedFunctionReferences] Implement call_ref (#3396)Alon Zakai2020-11-241-0/+3
* Rename atomic.notify and *.atomic.wait (#3353)Heejin Ahn2020-11-131-3/+3
* Prototype new SIMD multiplications (#3291)Thomas Lively2020-10-281-0/+13
* Implement i8x16.popcnt (#3286)Thomas Lively2020-10-271-0/+1
* Implement v128.{load,store}{8,16,32,64}_lane instructions (#3278)Thomas Lively2020-10-221-0/+8
* GC: Add stubs for the remaining instructions (#3174)Daniel Wirtz2020-09-291-1/+19
* GC: Add i31 instructions (#3154)Daniel Wirtz2020-09-241-2/+5
* GC: Add ref.eq instruction (#3145)Daniel Wirtz2020-09-211-1/+3
* Refactor Host expression to MemorySize and MemoryGrow (#3137)Daniel Wirtz2020-09-171-2/+2
* Update Pop text format to handle tuples (#3116)Thomas Lively2020-09-111-10/+2
* Add anyref feature and type (#3109)Daniel Wirtz2020-09-101-0/+1
* Update reference types (#3084)Daniel Wirtz2020-09-091-1/+0
* Implement prototype v128.load{32,64}_zero instructions (#3011)Thomas Lively2020-08-031-0/+2
* Rename anyref to externref to match proposal change (#2900)Jay Phelps2020-06-101-1/+1
* Add prototype SIMD rounding instructions (#2895)Thomas Lively2020-06-051-0/+8
* Remove `Push` (#2867)Thomas Lively2020-05-221-1/+0
* Implement i64x2.mul (#2860)Thomas Lively2020-05-191-0/+1
* Implement pseudo-min/max SIMD instructions (#2847)Thomas Lively2020-05-121-0/+4
* SIMD integer abs and bitmask instructions (#2703)Thomas Lively2020-03-201-0/+6
* Initial multivalue support (#2675)Thomas Lively2020-03-051-1/+4
* [NFC] Enforce use of `Type::` on type names (#2434)Thomas Lively2020-01-071-104/+104
* Add support for reference types proposal (#2451)Heejin Ahn2019-12-301-0/+7
* SIMD {i8x16,i16x8}.avgr_u instructions (#2539)Thomas Lively2019-12-181-0/+2
* Fix catch parsing (#2428)Heejin Ahn2019-11-111-1/+0
* Add i32x4.dot_i16x8_s (#2420)Thomas Lively2019-11-041-0/+1
* Add SIMD integer min and max instructions (#2416)Thomas Lively2019-11-011-0/+12
* Add push/pop support for anyref (#2376)Heejin Ahn2019-10-101-0/+1
* v8x16.swizzle (#2368)Thomas Lively2019-10-031-0/+1
* SIMD load and extend instructions (#2353)Thomas Lively2019-09-241-0/+6
* v128.andnot instruction (#2355)Thomas Lively2019-09-241-0/+1
* vNxM.load_splat instructions (#2350)Thomas Lively2019-09-231-0/+4
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